Electrical pulse counters – pulse dividers – or shift registers: c – Starting – stopping – presetting or resetting the counter – Counter chains with a radix or base other than the number...
Patent
1981-06-12
1984-04-17
Heyman, John S.
Electrical pulse counters, pulse dividers, or shift registers: c
Starting, stopping, presetting or resetting the counter
Counter chains with a radix or base other than the number...
377 48, 377114, H03K 2136
Patent
active
044438877
ABSTRACT:
A frequency-dividing circuit comprises an asynchronous counter having a plurality of one-half frequency-dividers connected in series in a plurality of stages in which a master clock signal is applied to an input terminal of the initial stage, for asynchronously producing output signals of each of the one-half frequency-dividers, where the asynchronous counter is set with a preset data n (n is an integer) which is preset according to a desired frequency-dividing ratio when a load pulse is applied, a coincidence detection circuit for detecting the coincidence of a plurality of outputs supplied from the asynchronous counter, and a frequency-divided output signal and load pulse generation circuit supplied with the master clock signal and an output signal of the coincidence detection circuit, for generating a frequency-divided output signal and a load pulse. The frequency-divided output signal and load pulse generation circuit supplies a load pulse to the asynchronous counter.
REFERENCES:
patent: 3096483 (1963-07-01), Ransom
patent: 3976946 (1976-08-01), Schroder
patent: 4041403 (1977-08-01), Chiapparoli
patent: 4150337 (1979-04-01), Sheller
patent: 4331926 (1982-05-01), Minakuchi
Heyman John S.
Victor Company of Japan Ltd.
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