Frequency divider

Details Frequency divider Frequency divider

1985-06-28

1988-02-16

Heyman, John S.

Electrical pulse counters, pulse dividers, or shift registers: c

Systems

Pulse multiplication or division

377 54, 377108, 377110, 364703, H03K 2138, H03K 2348

Patent

active

RE0326054

ABSTRACT:
In utilizing frequency dividers at high frequencies the maximum operating frequency is determined by the delay time through the frequency divider. To minimize this delay time, a digital frequency divider is provided having a binary counter constructed of flip-flops and a shift register coupled to the output of said counter, wherein the output state of the shift register is forcibly reduced to a low level in response to a control signal for varying the number of frequency division of said counter. A circuit is also provided for feeding the input terminal of the flip-flop at the first stage of said counter with an OR output made up of the outputs of said shift register and said counter. Thus, the digital frequency divider can operate at a speed which is limited only by the toggle frequency of said flip-flop circuits.

REFERENCES:
patent: 3230352 (1966-01-01), Grondin et al.
patent: 3426180 (1969-02-01), Smith
patent: 3673501 (1972-06-01), Zeph
patent: 3818242 (1974-06-01), Freedman
patent: 3978413 (1976-08-01), Frohwerk
patent: 3987313 (1976-10-01), Pfleiderer
patent: 4053739 (1977-10-01), Miller et al.
patent: 4184068 (1980-01-01), Washburn
patent: 4234849 (1980-11-01), Crilly, Jr.
patent: 4264863 (1981-04-01), Kojima

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