Electrical pulse counters – pulse dividers – or shift registers: c – Particular transfer means – Including logic circuit
Patent
1994-07-22
1996-04-16
Heyman, John S.
Electrical pulse counters, pulse dividers, or shift registers: c
Particular transfer means
Including logic circuit
377121, 377106, 327118, H03K 2340
Patent
active
055090400
ABSTRACT:
A frequency divider includes a transmission gate having input and output terminals and a gate terminal to which a single-phase clock signal is applied to turn off and off the transmission gate; an element having an input terminal connected to the output terminal of the transmission gate for inversion, delay and amplification of a signal input to the input terminal of the element to produce an output signal and outputting the output signal to the input terminal of the transmission gate; and a frequency divider output terminal connected to the output terminal of the element and to the input terminal of the transmission gate for outputting a signal having a frequency equal to 1
(n=integer) of the frequency of the clock signal. Since the frequency divider includes one transmission gate and one element, the delay time of the critical path required for inverting the produced frequency-divided signal is reduced so that accurate frequency division is performed with a high-speed clock. Further, accurate frequency division is achieved with a single-phase clock signal.
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patent: 4119867 (1978-10-01), Moritawa et al.
patent: 4855895 (1989-08-01), Shigaki et al.
patent: 4902909 (1990-02-01), Chantepie
patent: 5003566 (1991-03-01), Gabillard et al.
patent: 5163074 (1992-11-01), Isobe
Rocchi et al, "GaAs Digital Dynamic IC's for Applications Up To 10 GHz", IEEE Journal of Solid-State Circuits, vol. SC-18, No. 3, Jun. 1983, pp. 369-376.
Heyman John S.
Mitsubishi Denki & Kabushiki Kaisha
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