Electrical pulse counters – pulse dividers – or shift registers: c – Starting – stopping – presetting or resetting the counter – Counter chains with a radix or base other than the number...
Patent
1986-03-10
1987-12-22
Heyman, John S.
Electrical pulse counters, pulse dividers, or shift registers: c
Starting, stopping, presetting or resetting the counter
Counter chains with a radix or base other than the number...
377 72, 377 74, 377105, 377 47, H03K 2110, H03K 2344, H03K 2348
Patent
active
047150521
ABSTRACT:
A frequency divide by n circuit, where n is an odd number, which includes means for splitting an incoming clock signal of frequency "f" into two non-overlapping complementary clock signals of frequency "f" and a shift register circuit. The shift register circuit is coupled to the signal splitting means and generates an output clock signal of frequency f
in response to the two complementary clock signals. The output clock signal has a duty cycle equal to ((n-1)/2+D.sub.in)
where D.sub.in is the duty cycle of the incoming clock signal. The output duty cycle is substantially independent of processing and operating conditions.
REFERENCES:
patent: 3258696 (1966-06-01), Heymann
patent: 3609391 (1971-09-01), Hatano et al.
patent: 3898480 (1975-08-01), Spence et al.
patent: 3930169 (1975-12-01), Kuhn, Jr.
patent: 4002926 (1977-01-01), Moyer
patent: 4353030 (1982-10-01), Nakamura et al.
Anderson Rodney M.
Graham John G.
Heyman John S.
Texas Instruments Incorporated
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