Frequency diverse discrete-time phase-lock device and apparatus

Oscillators – Automatic frequency stabilization using a phase or frequency... – With reference oscillator or source

Reexamination Certificate

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C331S00100A, C327S156000, C327S159000

Reexamination Certificate

active

07893775

ABSTRACT:
A discrete-time phase lock loop (DTPLL) includes an analog section comprising a digital-to-analog converter (DAC) and an oscillator, operative to provide a clock signal based on an input from the DAC. The DTPLL also includes a digital signal processor (DSP). The DSP includes a loop controller state machine; a phase detector; a counter, operative to receive clock signals from the oscillator and to provide a count value to the phase detector; a divider, operative to receive a reference signal and to provide a reference pulse output to the phase detector; and a loop filter operative to provide a control effort value based on an output from the phase detector. Based on the phase error value, an output of the oscillator is changed to reduce the phase error to a steady state value.

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patent: 6888342 (2005-05-01), Bradley
patent: 7042972 (2006-05-01), Fahim
patent: 2004/0146132 (2004-07-01), Staszewski et al.
Kevin Johnson, “Measure PLL Open-Loop Response With The Loop Closed,” Electronic Design Magazine. Nov. 22, 1990, pp. 79-86.
Tim Wescott, “Applied Control Theory for Embedded Systems,” ISBN-13:978-0-7506-7839-1, Chapter 9, Section 3 entitled “In Loop Measurement,” pp. 229-234, Apr. 2006.

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