Miscellaneous active electrical nonlinear devices – circuits – and – Signal converting – shaping – or generating – Frequency or repetition rate conversion or control
Reexamination Certificate
2001-09-07
2002-12-03
Ton, My-Trang Nu (Department: 2816)
Miscellaneous active electrical nonlinear devices, circuits, and
Signal converting, shaping, or generating
Frequency or repetition rate conversion or control
Reexamination Certificate
active
06489816
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates generally to electronic circuits. The present invention relates more specifically to frequency converter circuits that may be implemented in CMOS (complementary metal-oxide semiconductor technology) or other semiconductor technologies and operated at RF (radio frequency).
BACKGROUND
Frequency converter circuits are well known in the electronics field and especially in the RF field. Frequency converter circuits are typically implemented as analog multiplier circuits and are used in many different applications such as modulators, demodulators, upconverters, downconverters and mixers, to name a few.
The use of MOS (metal-oxide semiconductor, including CMOS) offers benefits such as low cost and efficiency as compared with other technologies. However, the linear dynamic voltage range of MOS devices is quite limited. Moreover, significant bias current is required to keep MOS devices in a linear region. Furthermore, MOS devices limited to operation in a linear region operate at relatively small signal levels, and thus may be prone to noise pickup and may therefore be undesirable.
Provided input voltages are small, simple CMOS versions of a GC (Gilbert cell) circuit can be used as a frequency converter.
A conventional GC frequency converter is implemented with three differential-pair amplifiers. Two of the differential-pair amplifiers, which each receive a first differential input, are “stacked” on the third differential-pair amplifiers, which receive a second differential input. Each differential-pair amplifier is typically implemented with two transistors.
Typically, if the conventional GC frequency converter is used for an upconverting (modulating) application, the first differential input is the carrier (higher frequency) signal and the transistors of the upper differential pair amplifiers operate in a saturated (i.e., non-linear) region. The second differential input is a baseband signal (which has a much lower frequency than the carrier signal) and the transistors of the lower differential-pair amplifier operate in a linear region. A bias is set for the conventional GC frequency converter to provide a quiescent DC (direct current) that will place the transistors of the lower differential-pair amplifier in a good operating point with a suitable current. The correct current bias depends in particular upon the ratings of the transistors, geometry, and finger multiplier (or m-number) as is well known in the art.
FIG. 1
is a graph
200
illustrating voltage (horizontal axis, in volts) versus current (vertical axis, in microamps) for an exemplifying prior art GC frequency converter. Curve
201
represents current in one leg of the GC frequency converter and curve
202
represents current in the other leg. It should be noted that signal current at the operating point is small and the DC bias level must be appropriately set. Moreover, signal current is only a relatively small fraction of DC bias resulting in poor efficiency. Also, in order for the transistors of lower differential-pair amplifiers to remain firmly in the linear region, signal voltage must be limited to around
50
mV, and actually even less voltage may be used if the bias current cannot be set with accuracy. The conditions thus described lead to a number of problems. Firstly, the bias current must be set with care and perhaps with expensive compensation. Secondly, the value of signal voltage which is allowed is too small, especially in a noisy digital signal environment. Thirdly, the second stage of the prior art GC frequency converter is also forced to operate at low signal levels, and therefore prone to noise for both input and output.
Thus, a need exists to provide frequency converter circuits that operate efficiently, with good linearity, and which support higher signal levels.
The publications listed below are considered relevant background material since alternative solutions or components are included in the application:
[1] Keng Leong Fong, Robert G. Meyer, “Monolithic RF active mixer design,” IEEE Transactions On Circuits and Systems, Vol. 46, No. 3, March 1999, pp. 231-239.
[2] Shenggao Li, Jerasimos Zohios, Jung H Choi, Mohammed Ismail, “RF CMOS Mixer Design and Optimization For Wideband CDMA Application,” Mixed-Signal Design, 2000. SSMSD, 2000 Southwest Symposium, pp. 45-50.
[3] G. Giustolisi, G. Palmisano, G. Palumbo, C. Strano, “A Novel 1.5-V CMOS Mixer,” VLSI, 1998, pp. 113-117.
[4] Leonard A. MacEachern, Tajinder Manku, “A Charge-Injection Method for Gilbert Cell Biasing,” Electrical and Computer Engineering, 1998. IEEE, Vol. 1, 1998, pp. 365-368.
[5] K.B. Ashby, “Mixer with current mirror load,” U.S. Pat. No. 6,029,060, issued February 2000.
SUMMARY OF THE INVENTION
According to an aspect of the invention, a frequency circuit may be constructed using two pairs of differential amplifying transistors, two current mirrors, a further pair of differential amplifying transistors, and a pair of bypass transistors. Each transistor of the further pair of differential amplifying transistors is operable to feed a respective one of the two current mirrors. Each of the two current mirrors is operable to feed a respective one of the two pairs of differential amplifying transistors. The bypass transistors are connected in parallel with a controlling side of the two current mirrors so that the bypass transistors reduce a direct current component of a current being mirrored.
According to a further aspect of the invention, a bias generating circuit provides a first bias voltage for controlling a current passing through each transistor of the pair of bypass transistors and a second bias voltage for controlling the amount of direct current passing through the further pair of differential amplifying transistors.
According to a still further aspect of the invention, a method for mixing a first signal having a first frequency with a second signal having a second frequency is provided. Included in the method are providing a first differential amplifier for the first signal to produce an amplified first signal, providing a bypass circuit to reduce direct current associated with the amplified first signal to produce a biased signal, applying the biased signal to a current mirror to produce a mirrored signal and applying the mirrored signal and the second signal to a second differential amplifier to produce an output signal.
According to a still further aspect of the invention, a mixer circuit is provided that includes:
A first stage for generating a first current in response to a first frequency signal, the first stage comprising a first pair of differential amplifying transistors.
A current mirror for generating a second current which mirrors some portion of he first current.
A bypass circuit for reducing a direct current component of the first current so that a reduced direct current component is mirrored by the current mirror.
A second stage for generating an output signal in response to a second frequency signal and the mirrored current.
According to another aspect of the invention, a circuit is provided that uses a CMOS GC (Gilbert cell) with the first stage supplying current to an amplifying current mirror, wherein the driving side of the current mirror includes DC (direct current) bypass circuit to optimally place the quiescent current levels.
REFERENCES:
patent: 5241227 (1993-08-01), Jung et al.
patent: 5872446 (1999-02-01), Cranford, Jr. et al.
patent: 5999804 (1999-12-01), Forgues
patent: 6029060 (2000-02-01), Ashby
patent: 6054889 (2000-04-01), Kobayashi
patent: 6057714 (2000-05-01), Andrys et al.
patent: 6300845 (2001-10-01), Zou
“Monolithic RF Active Mixer Design,” K.L. Fong et al.,IEEE Transactions on Circuits and Systems -II: Analog and Digital Signal Processing, vol. 46, No. 3, Mar. 1999, pp. 231-239.
“RF CMOS Mixer Design and Optimization for Wideband CDMA Application,” S. Li et al., Mised-Signal Design, 2000, SSMSD, 2000 Southwest Symposium, pp. 45-50.
“A Novel 1.5-V CMOS Mixer,” G. Giustolisi et al., VLSI 1
Nu Ton My-Trang
Signia Technologies
Skjerven Morrill LLP
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