Frequency converter for the stabilized power supply of asynchron

Electricity: motive power systems – Induction motor systems – Primary circuit control

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Details

318806, 363 58, H02P 540

Patent

active

048230650

DESCRIPTION:

BRIEF SUMMARY
The invention relates to a static frequency converter for the power supply of an asynchronous type motor, including a rectifier bridge connectable to a multiphase network, an intermediate DC circuit and an inverter with six static switches connected in a Graetz bridge, controlled by a pulse modulation device and connectable to the phase impedances of the motor.
Asynchronous motors fed from three-phase networks through frequency converters generally suffer from operating instability when they are lightly loaded. The appearance of an oscillation of the rotor of the motor may in fact be observed due to an energy exchange between the motor and the intermediate DC circuit in a frequency range of about 20 to 100% of the nominal frequency.
For correcting such instability, it would be possible to use a speed servo-control using a speed sensor, or else current sensors in the phase conductors of the motor, but such solutions are expensive and necessarily associated with the motor.
As is known, the voltage U and the frequency F for the supply of an asynchronous motor through a frequency converter must remain normally related by a given law, for example with a constant U/F ratio.
The aim of the present invention is especially to overcome the low frequency oscillation of the rotor of a lightly loaded asynchronous motor by reducing the power supply voltage U of the motor when such an oscillation occurs so as to momentarily reduce the U/F ratio. It aims in addition at stabilizing the drive of the motor using a simple device, while providing a good compromise between the drive quality and the desired stability.
It has as object to combine the desired low load stabilization with a limitation of the currents of the motor at the time of sudden load variations.
In accordance with the invention, the frequency converter includes a means for reading the current associated with the intermediate DC circuit and delivering a signal which is the image of the current in the intermediate circuit, processing means connected to the reading means and adapted for detecting instability of the signal, and a means for reducing the output voltages of the inverter, this means being adapted for modifying the modulated pulses delivered by the control device and being controlled by the processing means.
The frequency deviation thus obtained reduces the U/F ratio and places operation outside the zone of instability.
The means for reducing the output voltages of the inverter may cooperate with the device controlling the static switches of the inverter for alternately disabling the high channel switches and the group of low channel switches synchronously with the modulation exerted on each group of switches. The result is a good symmetrization of the currents of the motor.
In a first embodiment, the processing means deliver a reverse current excess signal ST and include a processing circuit connected to the current reading means and elaborating a filtered peak signal I.sub.d representative of the peak value of the reverse current and a comparator comparing this signal with an adjustable reference value I.sub.REF for generating, when I.sub.d >I.sub.REF, the reverse current excess signal ST applicable to the output voltage reduction means.
The construction of the stabilization device is thus very simple. Furthermore, it facilitates the addition of simple means for inhibiting the signal ST when the motor operates as a generator and, when required, disabling of the high or low channel or alternately of the high channel and of the low channel switches when a high load surge is detected in the generator mode.
In a second embodiment, the processing means include a member establishing the mean value of the image signal of the current in the intermediate circuit, as well as an A-D converter receiving the mean value signal and delivering a digital signal; the voltage reduction means include a processor having means for sampling the digital signal and means for evaluating the amplitude and/or the oscillation frequency of the signal; the control device includ

REFERENCES:
patent: 3753063 (1973-08-01), Graf
patent: 4139885 (1979-02-01), Overzet et al.
patent: 4186334 (1980-01-01), Hirata
patent: 4238821 (1980-12-01), Walker

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