Oscillators – Combined with particular output coupling network
Reexamination Certificate
2001-11-09
2003-07-08
Pascal, Robert (Department: 2817)
Oscillators
Combined with particular output coupling network
C375S376000
Reexamination Certificate
active
06590461
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to frequency conversion apparatus and method for generating an output signal of a frequency equivalent to a coefficient multiple of a frequency of a reference clock signal, and more specifically to a frequency synthesizer capable of outputting a high accuracy clock signal (e.g., about 15 ppm) of a frequency equivalent to a coefficient multiple of the input reference clock signal used for pixel position register (or matching) of a color laser print engine.
2. Related Background Art
Although colorization of a laser print engine is strongly requested, generally a process using four-color toners of Ye, Cy, Mg and Bk requires a fourfold print time as compared with a monochrome process. Therefore, it deals with such a problem by using a print engine which uses a four-drum structure containing four photosensitive drums to be used respectively for the four colors and also uses a two-beam laser capable of performing two-line writing at once.
FIG. 1
is a schematic diagram for explaining a four-drum machine. In
FIG. 1
, photosensitive drums
21
a
to
21
d
each of which is dedicated for each of the four colors are disposed in line, and the respective color toners are sequentially transferred to a print sheet
29
, whereby a color image is reproduced. An image writing unit shown in
FIG. 2
which forms an electrostatic latent image according to a light quantity of a laser beam is provided for each photosensitive drum. Next, an operation of a laser print engine shown in
FIG. 2
will be explained.
Explanation of Image Writing Unit
A laser chip
24
of two-beam type contains laser diodes a and b, and a photodiode c receiving each back light.
Driving currents Id
1
and Id
2
for controlling the respective laser diodes to generate beams are supplied from an LD (laser diode) driver
25
. A monitor current Im from the photodiode which detected the light quantity is input to the LD driver
25
, whereby APC (automatic power control) for the light quantities of the laser diodes a and b is performed. The laser chip
24
can not set an interval between two laser beam emission points to a one-pixel interval (about 42 &mgr;m at 600 dpi) due to its element characteristic. For this reason, as shown in
FIG. 3
, with respect to a pixel area represented by lattice lines, the laser beam emission points have been obliquely arranged so that two beams are generated at the positions apart from each other by, e.g., 16 pixels along a laser scan direction.
The modulated laser beam generated from the laser chip
24
is polarized by a polygon mirror
19
fixed to a motor shaft and rotated in the direction indicated by the shown arrow, and a photosensitive drum
21
is scanned by the modulated laser beam. An f-&thgr; lens
20
is used to condense the modulated and polarized laser beams onto the photosensitive drum
21
at a constant line speed.
If predetermined electrostatic electrification has been previously performed for the photosensitive drum
21
and print toner, an adhesion quantity of the print toner changes in proportion to the irradiation light quantity on the photosensitive drum
21
, whereby a halftone image can be printed. The positional relation between a BD (beam detect) mirror
22
and the photosensitive drum
21
is mechanically fixed, and the reflected laser beam from the BD mirror
22
is input to a light reception diode
23
and used to detect an information writing start position on the photosensitive drum
21
. The output from the light reception diode
23
is input to a horizontal sync signal generation circuit
28
, thereby generating a horizontal sync signal BD.
The horizontal sync signal BD is input to a pixel modulation circuit
26
. The pixel modulation circuit
26
generates a pixel clock synchronizing with the signal BD or a clock equivalent to a coefficient multiple of the pixel clock. Based on the pixel clock, read clocks RK
1
and RK
2
for reading the pixel data are input to a pixel data generation unit
27
. The pixel data generation unit
27
outputs pixel data D
1
and D
2
and corresponding writing clocks WK
1
and WK
2
to the pixel modulation circuit
26
. Based on the input pixel data, the pixel modulation circuit
26
outputs pixel modulation signals ON
1
and ON
2
enabling desired laser light quantity modulation to the LD driver
25
.
Correspondence of Pixel Modulation Circuit
Since a pixel modulation scale of the above-explained four-drum/two-beam laser print engine is eightfold as compared with that of a conventional one-drum/one-beam laser print engine, it is necessary to make the engine into an LSI. Further, since the four-drum machine has the image writing unit shown in
FIG. 2
for each color, it is necessary to perform pixel register for at least three items as follows.
First, it is necessary to correct image position misregister (i.e., out of image position register) caused by a timing error of the signal BD in each image writing unit. This can be electrically achieved up to about {fraction (1/32)} pixel by controlling a phase (delay) of the pixel clock in the pixel modulation circuit
26
.
Next, since the two-beam laser chip
24
has the low-angle oblique arrangement as described above, it is necessary to correct the pixel position because the beam interval changes, as shown in the drawings, due to error and change of the attachment angle thereof. Also, this can be electrically achieved up to about {fraction (
1
/
32
)} pixel by controlling a phase (delay) of the pixel clock based on relative pixel position setting data RP in the pixel modulation circuit
26
.
Further, it is necessary to correct an error of image size caused by dispersion of optical machine accuracy occurring in equipments from the laser chip
24
, the polygon mirror
19
, the f-&thgr; lens
20
to the photosensitive drum
21
. This can be achieved based on pixel frequency setting data DF by installing a frequency synthesizer for changing a pixel clock frequency installed in the pixel modulation circuit.
For this reason, pixel position setting data DS (i.e., a signal including the relative pixel position setting data RP, the pixel frequency setting data DF and absolute pixel position setting data RG) for pixel position register is input to the pixel modulation circuit
26
in the image writing unit of FIG.
2
.
Pixel Modulation LSI Corresponding to Four-Drum/Two-Beam
FIG. 4
shows a structural example of an LSI system that the pixel modulation circuit
26
equipped with the frequency synthesizer and used for the four-drum/two-beam laser print engine (see
FIG. 2
) has been made into the LSI. A PLL (phase-locked loop) circuit
32
for generating a pixel clock is composed by the frequency synthesizer.
In
FIG. 4
, a reference clock CK is input to the PLL circuit
32
also functioning as the frequency synthesizer, and the PLL circuit
32
outputs an eight-phase clock bus K that is fourfold as compared with a pixel clock frequency and each phase is shifted by ⅛ periods (i.e., shifted by {fraction (1/32)} pixel). Also, the pixel position setting data DS is input to the PLL circuit
32
.
The pixel frequency setting data DF in the pixel position setting data DS is used as frequency division setting data in
FIG. 5
showing a structural example of the PLL circuit
32
. A control current Iv
0
of a variable frequency oscillation (VCO) circuit
6
included in the PLL circuit
32
and generating an eight-phase clock is output from the PLL circuit
32
. The horizontal sync signal BD is input to a BD delay circuit
30
and thus delay-controlled based on the pixel position setting data DS.
The control current Iv
0
is input to the BD delay circuit
30
which includes a structure that delay circuits equivalent to the variable delay circuit used in the variable frequency oscillation circuit
6
of the PLL circuit
32
are cascaded, and the signals BD of which timings are mutually shifted by {fraction (1/32)} pixel are output from the connection points of the delay circuits.
Fine adjustment bits of the absolute pixel pos
Canon Kabushiki Kaisha
Chang Joseph
Fitzpatrick ,Cella, Harper & Scinto
LandOfFree
Frequency conversion apparatus and method does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Frequency conversion apparatus and method, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Frequency conversion apparatus and method will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3010601