Frequency control and orthogonal detection circuit and FSK...

Pulse or digital communications – Receivers – Automatic frequency control

Reexamination Certificate

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

C375S322000, C375S335000, C375S334000

Reexamination Certificate

active

06553083

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a method for frequency control and orthogonal detection circuit and FSK (Frequency Shift Keying) receiver used for a digital radio receiver etc., particularly relates to a method for frequency control and orthogonal detection circuits and FSK receiver capable of reduction of a circuit size and improving precision of frequency control.
2. Description of the Related Art
Conventional orthogonal detection circuit is illustrated with reference to FIG.
4
. The
FIG. 4
is a block diagram of a conventional orthogonal detection circuit.
A conventional orthogonal detection circuit, as shown in
FIG. 4
, comprises a VCO (voltage control oscillator)
1
outputting an oscillating frequency, a phase shifter
2
shifting a phase of a signal 90°, the first mixing circuit
3
a
and the second mixing circuit
3
b
multiplying two signals, the first LPF (low path filter)
4
a
and the second LPF
4
b
removing a high frequency component, the first comparator
5
a
and the second comparator
5
b
outputting a digital signal over or not over a certain threshold value, the first moving average circuit
6
a
and the second moving average circuit
6
b
average an input signal, a phase angle detector
7
computing a phase angle, a differential analyzer
8
differentiating a phase angle signal, an integral electric discharge circuit
9
integrating an inputted signal for 1 symbol time, a phase detection circuit
10
detecting a changing point of a phase in an input signal, a synchronizing circuit
11
outputting a synchronized signal for an inputted signal showing detected changing point of a phase, a decision circuit
12
deciding the state of an integral signal, a standardizing circuit
13
outputting an appropriate integrated result based on the decision signal, a differential circuit
14
computing a difference between the output of the integral electric discharge circuit
9
and the output of the standardizing circuit
13
, and an AFC (automatic frequency control) circuit
15
controlling local oscillation frequency of the VCO
1
.
Herewith, functions of each part of a conventional orthogonal detection circuit will be specifically described with reference to the
FIGS. 4 and 5
.
FIG. 5
is a drawing of a timing chart showing action of the conventional orthogonal detection circuit.
The VCO
1
is an oscillator working as a local oscillator of which oscillation frequency is controlled by the AFC circuit
15
that will be mentioned later.
The phase shifter
2
shifts the phase of a signal inputted from the VCO
1
90°.
The first mixing circuit
3
a
multiplies a received signal by a signal (oscillation frequency) inputted from the VCO
1
to output to the first LPF
4
a.
The signal outputted from the first mixing circuit
3
a
is one of the received signals and has the same phase component (hereafter, “I phase component”) as that of the signal outputted by the VCO
1
.
The second mixing circuit
3
b
multiplying a received signal to a shifted signal inputted from the phase shifter
2
to output to the second LPF
4
b.
A signal outputted by the second mixing circuit
3
b
is one of the received signal and a component orthogonal (hereafter, “Q phase component”) to the signal outputted by the VCO
1
.
The first LPF
4
a
removes a high frequency component of the signal of I phase component inputted from the first mixing circuit
3
a
to make, for example, a signal as shown in FIG.
5
(
a
), and output to the first comparator
5
a.
The second LPF
4
b
removes a high frequency component of the signal of Q phase component inputted from the second mixing circuit
3
b
to make, for example, a signal as shown in FIG.
5
(
b
), and output to the second comparator
5
b.
The first comparator
5
a
detects a signal inputted from the first LPF
4
a
over a certain threshold value; if the signal is over the threshold value, outputs 1 bit digital signal representing “1”, and if not over, outputs 1 bit digital signal representing “0”.
This means, for example, when a signal of the FIG.
5
(
a
) is inputted to the first comparator
5
a,
the first comparator
5
a
outputs a signal as shown in the FIG.
5
(
c
).
The second comparator
5
b,
as same as the first comparator
5
a,
detects a signal inputted from the second LPF
4
b
over a certain threshold value; if the signal is over the threshold value, outputs 1 bit digital signal representing “1” and if not over, outputs 1 bit digital signal representing “0”.
This means, for example, when a signal of the FIG.
5
(
b
) is inputted to the second comparator
5
b,
the second comparator
5
b
outputs a signal as shown in the FIG.
5
(
d
).
Hereafter, a signal outputted by the first comparator
5
a
is named “quantized signal I” and a signal outputted by the second comparator
5
b
is named “quantized signal Q”.
The first moving average circuit
6
a
averages a quantized signal I inputted from the first comparator
5
a
to generate a signal with a gradually changed wave form. Specifically, for example, when a signal shown in the FIG.
5
(
c
) is inputted, the first moving average circuit
6
a
outputs a signal with a wave form shown in the FIG.
5
(
e
).
The second moving average circuit
6
b
averages a quantized signal Q inputted from the second comparator
5
b
to generate a signal with a gradually changed wave form. Specifically, for example, when a signal shown in the FIG.
5
(
d
) is inputted, the second moving average circuit
6
b
outputs a signal with a wave form shown in the FIG.
5
(
f
).
The phase angle detector
7
divides a signal inputted from the second moving average circuit
6
b
with a signal inputted from the first moving average circuit
6
a,
and compute arctangent of the quotient yielded by the division to output to the differential analyzer
8
.
If a signal inputted from the first moving average circuit
6
a
is assumed “I” and a signal inputted from the second moving average circuit
6
b
is assumed “Q”, a signal of the phase angle (a phase angle signal) &thgr; outputted by the phase angle detector
7
is expressed by the following formula (1).
&thgr;=tan
−1
(
Q/I
)  [Formula 1]
In the phase angle detector
7
, the phase angle signal computed based on the [Formula 1] has specifically the wave form shown in the FIG.
5
(
g
).
The differential analyzer
8
differentiates the phase angle signal inputted from the phase angle detector
7
by time and outputs the change of the angle as a signal expressed by a digital signal of at least 2 bits as shown in the FIG.
5
(
h
).
In other words, in the FIG.
5
(
h
), a signal expressing “−1”, a signal expressing “+1”, and a signal expressing “0” are outputted for start of gradual decrease in the strength of the phase angle signal, start of gradual increase in the strength of the phase angle signal, no change of the strength of the phase angle signal, respectively.
Hereafter, the signal outputted by the differential analyzer
8
is called “Eye-pattern”.
For reference, plus and minus of a signal are commonly expressed using MSB (most significant bit) used for digital signal. For example, “−1”, “+1”, and “0” are expressed as “11”, “01”, and “00”, respectively.
The integral electric discharge circuit
9
computes the integral value of Eye-pattern inputted from the differential analyzer
8
for every 1 symbol time based on the synchronized signal inputted from synchronizing circuit
11
, that will be mentioned later, at each 1 symbol time, to output as an integral signal. The integral signal is reset to “0” for each 1 symbol, as shown in the FIG.
5
(
i
) to become a function increasing and decreasing with approximately constant proportions.
The phase detection circuit
10
detects a point (change point) (the point A to point E in the FIG.
5
), in which the change of a phase become discrete, on the basis of quantized signal I and quantized signal Q inputted from the first comparator
5
a
and the second comparator
5
b,
respectively, and output a signal sh

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Frequency control and orthogonal detection circuit and FSK... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Frequency control and orthogonal detection circuit and FSK..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Frequency control and orthogonal detection circuit and FSK... will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-3082360

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.