Amplifiers – With periodic switching input-output
Reexamination Certificate
2002-12-30
2003-09-16
Choe, Henry (Department: 2816)
Amplifiers
With periodic switching input-output
C330S292000, C330S010000, C327S124000
Reexamination Certificate
active
06621334
ABSTRACT:
BACKGROUND OF THE INVENTION
Field of the Invention
The invention relates to a frequency-compensated, multistage amplifier configuration and to a method for operating a frequency-compensated amplifier configuration.
It is a conventional practice to use chopper amplifiers for offset-free, low-drift amplification of low-frequency signals. Such amplification involves the useful signal that is to be amplified by the amplifier having a chopper frequency applied to it both at the input and at the output. The input of the amplifier, accordingly, has a chopped useful signal applied to it that is amplified and is demodulated at the output of the amplifier with the correct phase. In such a case, the chopper signal is normally a square-wave signal.
Such a chopper amplifier is described, by way of example, in Enz et al.: “A CMOS Chopper Amplifier”, IEEE Journal of Solid-State Circuits Vol. SC-22, No 3, June 1987 pp. 335-341. However, spikes arise in this case. Filter measures are used to attempt to eliminate the effects thereof on the residual offset.
Japanese Patent document 59-224906 A specifies a chopper amplifier in which switched capacitors are provided to reduce stray capacitances in a negative feedback loop.
In addition, switched-capacitor circuits exist in which cyclic switching and charge reversal in capacitors, likewise, result in the amplifier output producing a square-wave voltage of high amplitude that has the useful signal superimposed on it.
A drawback of these circuits is that stray capacitances in the amplifier and load capacitances at the output result in the output signal from the amplifier lagging behind its input signal. To compensate for these phase shifts that arise at high frequencies, which are disadvantageous particularly when a plurality of amplifier stages are disposed in series and, as a result, an amplifier configuration can become unstable, it is conventional to use frequency compensation capacitors, “Miller capacitors,” which attenuate the gain at high frequencies. In such a context, the stability of the amplifier is achieved by reducing the gain-bandwidth product (GBW).
With chopped amplifier operation, the frequency compensation capacitors need to undergo charge reversal for every state change in the chopper signal. This has the drawback that sensitive measurement amplifiers and a given analog bandwidth and accuracy allow only low chopper frequencies to be produced. A low chopper frequency results in poor noise properties as a result of flicker effects and in higher signal delay times in the sampling amplifier.
Even designing the most broadband and fastest amplifiers possible that allow high chopper frequencies is disadvantageous on account of the relatively high power consumption and the relatively large amount of chip area required. In addition, a relatively high level of thermal noise is produced as a result of the relatively high gain-bandwidth product.
U.S. Pat. No. 5,621,319 to Bilotti et al. discloses a method for compensating for the directional offset voltage that is normally produced with Hall sensors. In such a case, the exciter current from the Hall sensor is cyclically switched between two terminal pairs for supplying the exciter current that are disposed at right angles to one another, while the Hall voltage can be picked off on the respective other terminal pair. This produces a similar problem to that with the chopper amplifier described because a chopped output signal from the Hall sensor needs to be amplified. With the chopped Hall principle too, the amplified, modulated signal is demodulated with the correct phase at the amplifier output, for example, by integration, with the offset voltage being largely eliminated on average over time.
The document “Spinning-current method for offset reduction in Silicon Hall plates” by Peter Jan Adriaan Munter, Delft University Press 1992, page 12 likewise specifies a Hall element that is operated in chopped mode and in which the Hall sensor has a multiplicity of connections that are interchanged cyclically, the Hall voltage respectively being able to be picked off on a terminal pair that is disposed at right angles to the terminal pair for the exciter current.
All the chopper amplifiers described have the common drawback that either high gain factors can be produced for a low chopper frequency and, hence, also for a low analog bandwidth, or relatively high bandwidths can be produced only with lower gains and with high power loss, that a large chip area is required and that they have poor noise properties.
SUMMARY OF THE INVENTION
It is accordingly an object of the invention to provide a frequency-compensated, multistage amplifier configuration, and method for operating a frequency-compensated amplifier configuration that overcome the hereinafore-mentioned disadvantages of the heretofore-known devices and methods of this general type and that allows large gain bandwidths to be produced for a small chip area requirement and has a low power consumption, a low noise, and high levels of accuracy and stability.
With the foregoing and other objects in view, there is provided, in accordance with the invention, a frequency-compensated, multistage amplifier configuration, including an input amplifier stage having an input and an output, an output amplifier stage having an input connected to the output of the input amplifier stage and output, a modulator connected to the input of the input amplifier stage, the modulator supplying the input amplifier stage with a useful signal chopped into a first and a second clock phase, a first Miller compensation capacitor electrically activatable between the input of the output amplifier stage and the output of the output amplifier stage during the first clock phase, and a second Miller compensation capacitor electrically activatable between the input of the output amplifier stage and the output of the output amplifier stage during the second clock phase.
In line with the invention, the Miller compensation capacitor used for an amplifier in the output stage needs to be provided in duplicate so that, when a chopped input signal is supplied, the first capacitor is active during a first clock phase and the second capacitor is active during a second clock phase. Such a configuration avoids the need for cyclic charge reversal in the compensation capacitor. This is so because, after just a few clock cycles, both the first capacitor and the second capacitor are charged and in further clock cycles follow only the small voltage differences that are caused by the useful signal and that have smaller amplitudes and are slower as compared with the voltage differences caused by the chopper clock frequency.
The amplifier, therefore, allows continuous-time signal processing, in contrast to switched capacitor filters operating based upon the sample-and-hold principle.
In a chopper amplifier, the first and second clock phases differ by virtue of the useful signal having a square-wave function of high amplitude superimposed on it so that the useful signal is available in uninverted form during the first clock phase and is available in inverted form during the second clock phase.
Alternatively, the useful signal can be chopped so that the amplifier can be supplied with the useful signal unchanged during one clock.phase and with an offset equalization signal during another clock phase.
The present principle avoids cyclic charge reversal in Miller or compensation capacitors in the frequency-compensated amplifier.
The basic advantage of the configuration described, therefore, has its basis in that, when dimensioning the amplifier, it is no longer necessary to take into account the requirements in the frequency range of the chopper clock frequency, but, instead, constructing the amplifier involves taking into account the actual useful signal bandwidth, which is usually much lower than the chopper frequency. Such a process allows the amplifier to be produced with a small chip area and low power loss with a high level of accuracy and low noise, while in the prior art compensation capacitor configura
Ausserlechner Udo
Motz Mario
Choe Henry
Greenberg Laurence A.
Infineon - Technologies AG
Mayback Gregory L.
Stemer Werner H.
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