Frequency comparator circuit

Details Frequency comparator circuit Frequency comparator circuit

1980-02-27

1982-03-30

Heyman, John S.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

328134, 307518, 307527, H03K 1332, H03K 526, H03L 724

Patent

active

043226868

ABSTRACT:
The frequency comparator circuit serves to determine whether the signal received contains an expected signal of frequency f and time B. After clipping, the signal received is used as the logic signal A for comparison with two square-wave signals F and F.sub.q in quadrature and of frequency f. Two counters count forwards respectively when AFF.sub.q U AFF.sub.q =1 and AFF.sub.q U AFF.sub.q =1 and count backwards when AFF.sub.q u AFF.sub.q =1 and AFF.sub.q U AFF.sub.q =1. The passage of the counters through predetermined counts indicates that the expected signal has been received. In order to reduce errors and obtain a maximum count with the expected signal, a control device incorporating a delay circuit only authorises the operation of the counters when A and A delayed by K/f differ, with K such that K/f.ltoreq.B<K+1/f.

REFERENCES:
patent: 3818358 (1974-06-01), Russell
patent: 3942125 (1976-03-01), Horiuchi et al.
patent: 4128812 (1978-12-01), Paulis
patent: 4169264 (1979-09-01), Parker
patent: 4220924 (1980-09-01), Osann

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