Frequency calibration loop circuit

Details Frequency calibration loop circuit Frequency calibration loop circuit

2009-10-16

2011-10-04

Mis, David (Department: 2817)

Oscillators

Automatic frequency stabilization using a phase or frequency...

Tuning compensation

C331S017000, C331S025000, C331SDIG002, C455S260000

Reexamination Certificate

active

08031009

ABSTRACT:
A frequency calibration loop circuit having a pre-set frequency channel word (FCW) command value, a bit inputted to obtain a target frequency in an oscillator and a pre-set minimum division ratio n (n is a constant) of a programmable divider, includes: an oscillator adjusting an oscillation frequency of an oscillation signal according to a control value; a programmable divider dividing the oscillation signal according to a division ratio to output a divided signal; a counter counting the number of clocks of the divided signal for one cycle of a reference signal to output a count value; and a frequency detector obtaining the control value by subtracting the count value from a reference comparison value, wherein the reference comparison value is obtained by dividing a Frequency Channel Word (FCW) command value by a minimum division ratio of the programmable divider.

REFERENCES:
patent: 7592874 (2009-09-01), Wicpalek et al.
patent: 2003/0184394 (2003-10-01), Lin et al.
patent: 2010/0134160 (2010-06-01), Min et al.
William B. Wilson et al., “A CMOS Self-Calibrating Frequency Synthesizer”, IEEE Journal of Solid-State Circuits, Oct. 10, 2000, pp. 1437-1444, vol. 35, No. 10.

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