Frequency agile phase locked loop

Details Frequency agile phase locked loop Frequency agile phase locked loop

2006-11-08

2010-02-16

Lugo, David B (Department: 2611)

Pulse or digital communications

Systems using alternating or pulsating current

Plural channels for transmission of a single pulse train

C375S376000

Reexamination Certificate

active

07664196

ABSTRACT:
A circuit having a frequency controllable oscillator and a variable time delay circuit. The time delay circuit is fed by a signal produced by the oscillator, such time delay circuit being coupled to the oscillator to control the frequency of the signal produced by the oscillator. The circuit allows frequency agility of a phase locked loop although locked to a common reference frequency.

REFERENCES:
patent: 3251062 (1966-05-01), Ghose
patent: 6982670 (2006-01-01), Mohamadi
patent: 2001/0036240 (2001-11-01), Gossmann et al.
patent: EP 1 624 574 (2006-08-01), None
patent: EP 0 847 142 (1998-10-01), None
Notification of transmittal of the International Search Report and the Written Opinion of the International Searching Authority, or the Declaration dated Apr. 24, 2008, Application No. PCT/US2007/022213.
Notification Concerning Transmittal of International Preliminary Report on Patentability (Chapter 1 of the Patent Cooperation Treaty), PCT/US2007/022213 dated May 22, 2009 and the Written Opinion of the International Searching Authority, 8 pages.

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