Frequency adjustment means for electric timepiece

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58 23R, G04C 1702

Patent

active

041887751

ABSTRACT:
An electronic timepiece having an integrated circuit including a high frequency oscillator with a frequency divider circuit for dividing the high frequency output to provide a low frequency time unit signals. A time counter circuit responds to the time unit signals and develops time information signals. A decoder is coupled to the time counter circuit and provides display information signals in response to the time information signals. A driver circuit provides drive signals in response to the display information signals and an electro-optical device responds to the drive signals to display time information. A frequency adjustment circuit adjusts the high frequency signal to a correct value and has a plurality of frequency adjustment ratio setting terminals selectively coupled to output terminals of the driver circuit to develop outputs representative of frequency adjustment ratios. Pulse generating circuitry is provided for generating output pulses in dependence upon the output signals and the high frequency signal is adjusted to a correct valve in response to output pulses.

REFERENCES:
patent: 3914931 (1975-10-01), Tsuruishi
patent: 3945194 (1976-03-01), Gollinger
patent: 3978649 (1976-09-01), Naito
patent: 4045952 (1977-09-01), Kashio
patent: 4051663 (1977-10-01), Chihara et al.
patent: 4055945 (1977-11-01), Schwarzschild et al.

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