Frequency adjusting methods and systems

Details Frequency adjusting methods and systems Frequency adjusting methods and systems

1979-05-16

1982-02-02

Moore, David K.

Oscillators

Automatic frequency stabilization using a phase or frequency...

Afc with logic elements

331 25, H03L 700

Patent

active

043142087

ABSTRACT:
A frequency synthesizing arrangement is disclosed employing a phase-locked loop. The phase detector of the phase-locked loop receives an input frequency via a divider having a division factor N, and compares this divided frequency with the frequency received from a voltage controlled oscillator via a divider having a division factor N-b. Any difference is eliminated by the control signal from the phase detector which is connected to adjust the VCO frequency. Therefore, the phase-locked loop multiplies the divided input frequency by the factor (N-b). By making b very much smaller than N, the minimum step change in output frequency is approximately F.b/N.sup.2 (where F is the input frequency to the divider). In this way, the minimum step change in frequency can be made very small.

REFERENCES:
patent: 3651422 (1972-03-01), Underhill
patent: 4024464 (1977-05-01), Underhill et al.
patent: 4035833 (1977-07-01), Shepard
Evans, W. A. et al., "A Microprocessor Control Phase Locked Signal Source", Radio and Electronic Engineer vol. 48, No. 12, 12/78, pp. 593-602.

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