Multiplex communications – Wide area network – Packet switching
Patent
1987-11-10
1989-04-04
Paschall, M. H.
Multiplex communications
Wide area network
Packet switching
370 60, 370 58, H04J 302
Patent
active
048192260
ABSTRACT:
A framer circuit which may be implemented as a single chip is disclosed. The framer circuit performs a number of functions in a DTDM network including generating trains of empty DTDM frames, enabling the writing of data packets into specific DTDM frames and the examination of header data in specific DTDM frames to generate signals for the control of peripheral circuits. The framer circuit comprises an input serial/parallel converter, a frame detection circuit, an output parallel/serial converter and a control unit comprising one or more finite state machines for generating proper control signals such as read and write strobes for data insertion and extraction.
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Beckner Mark W.
Chao Hung-Hsiang J.
Robe Thomas J.
Smoot Lanny S.
Bell Communications Research Inc.
Falk James W.
Paschall M. H.
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