Multiplex communications – Data flow congestion prevention or control – Control of data admission to the network
Reexamination Certificate
2006-05-23
2006-05-23
Dildine, R. Stephen (Department: 2133)
Multiplex communications
Data flow congestion prevention or control
Control of data admission to the network
C340S003210, C370S389000, C370S395520, C370S912000
Reexamination Certificate
active
07050394
ABSTRACT:
A method includes extracting packets from within a received frame, generating digests of the extracted packets, and hashing the generated digests.
REFERENCES:
patent: 6763023 (2004-07-01), Gleeson et al.
patent: 2003/0012374 (2003-01-01), Wu et al.
patent: 2003/0058870 (2003-03-01), Mizrachi et al.
patent: 2004/0085953 (2004-05-01), Davis
patent: 2004/0095934 (2004-05-01), Cheng et al.
patent: 2004/0097199 (2004-05-01), Kawamura et al.
patent: 2004/0151117 (2004-08-01), Charcranoon
patent: 2005/0044365 (2005-02-01), Haukka et al.
Tsern-Huei Lee et al.; Scalable Packet Digesting Schemes for IP Traceback; 2004 IEEE International Conference on Communications, vol. 2, Jun. 20-24, 2004; pp.: 1008-1013
Tektroniz: SONET Telecommunications Standard Primer; 24 pages.
Wolf, et al: Design Issues for High-Performance Active Routers; IEEE Journal on Selected Areas in Communications, vol. 19, No. 3, Mar. 2001, 6 pages.
Intel IXB8055 UTOPIA/POS Reference Design, Intel Internet Exchange Architecture, 2001, 2 pages.
Intel: ATM/OC-3 to Fast Ehernet IP Router Example Design, Intel Internet Exchange Architecture, 2001, 4 pages.
Bay Microsystems, Inc.: Complex Tunnel Resolution for Today's Classification Problems, As Presented at the Communications Design conference, Sep. 2002, 8 pages.
Bergen et al: Streaming Interface (NPSI) Implementation Agreement, Revision 1.0 Network Processing Forum, Streaming Interface Task Group, Oct. 18, 2002, 87 pages.
Iyer et al: ClassPI: An Architecture for Fast and Flexible Packet Classification, PMC-Sierra Inc., IEEE Network, Mar./Apr. 2001, 9 pages.
Intel: Intel IXP1200 Network Processor Family, Hardware Reference manual, Par No.: 278303-009, Dec. 2201, 272 pages.
Intel: IXF6048 Multi-Speed OC-1 to OC-48 IXF6012 Multi-Speed OC-1 to OC-12 SONET/SDH Cell/Packet Framers, product brief, 2000, 2 pages.
Intel: IX1200 Network Processor PPP Bridge Control Protocol Example Design, Application Note, Jun. 2001, 14 pages.
Johnson Erik J.
Newell Don
Dildine R. Stephen
Greenberg Robert A.
LandOfFree
Framer does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Framer, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Framer will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3630241