Framed chip hybrid stacked layer assembly

Details Framed chip hybrid stacked layer assembly Framed chip hybrid stacked layer assembly

1989-07-27

1991-05-07

Chaudhuri, Olik

Fishing, trapping, and vermin destroying

437 51, 437208, 437915, 29835, 29837, H01L 2160

Patent

active

050136879

ABSTRACT:
A stacked integrated circuit assembly and method of fabricating the same are disclosed. The assembly includes a plurality of insulating substrate layers each supporting one or more embedded integrated circuit chips. The substrates each incorporate substantially identical conductive patterns formed on the insulating layer surface and/or on an insulating film that covers the substrate. A plurality of apertures are then formed which intersect the patterns, followed by insertion of IC chips into the apertures. The insulating layer is then cut to form a plurality of segments which are subsequently stacked vertically to form a module.

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