Multiplex communications – Wide area network – Packet switching
Patent
1994-02-23
1995-10-31
Safourek, Benedict V.
Multiplex communications
Wide area network
Packet switching
3701053, H04J 306
Patent
active
054636272
ABSTRACT:
In a frame synchronizing apparatus for a receiver apparatus of a digital data radio communications system in which data are transmitted in frame periods with a fixed data sequence contained each frame, a data correlation circuit obtains successive sequences of values of vector difference between vector values constituting a demodulated digital baseband signal, and successively compares these sequences with a fixed vector difference sequence corresponding to the fixed data sequence, to derive a correlation signal substantially unaffected by any phase rotation in the baseband signal. A frame synchronizing circuit formed as a PLL for generating a frame synchronizing signal, includes a phase comparator which periodically indicates whether a detected phase difference between the correlation signal and frame synchronizing signal is effectively zero, positive or negative, and a counter holding a count value indicating a cumulative phase error between these signals. So long as the detected phase differences are successively effectively zero and the cumulative phase error is sufficiently small, the phase of the frame synchronizing signal is held unchanged, thereby achieving a high degree of phase stability.
REFERENCES:
patent: 5228036 (1993-07-01), Okamoto et al.
"Fast Adaptive Equalizers for Narrow-Band TDMA Mobile Radio" by D'Aria et al.; IEEE Transactions on Vehicular Technology, vol. 40, No. 2, May 1991; pp. 392-404.
Kunieda Yoshinori
Matsuoka Akihiko
Misaizu Kouei
Ohnishi Hiroshi
Yamamoto Yuuri
Matsushita Electric - Industrial Co., Ltd.
Safourek Benedict V.
Vu Huy D.
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