Frame synchronizer

Television – Synchronization – Locking of video or audio to reference timebase

Reexamination Certificate

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Details

C348S513000

Reexamination Certificate

active

06380981

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a frame synchronizer for suppressing a timing discrepancy between a video signal and a corresponding audio signal in a digital image display device or the like to an amount below a predetermined level.
2. Description of the Related Art
FIG. 7
is a schematic diagram showing the general configuration of a conventional frame synchronizer as disclosed in the “Audio phase automatic correction device (Japanese Patent Application Laid-Open No. 59-138168). In the figure, reference numeral
1
denotes a frame synchronizing circuit in the corresponding frame synchronizer, numeral
2
denotes an audio signal variable delay circuit, and numerals
3
a
and
4
a
denote respectively an input terminal and an output terminal for the frame synchronizing circuit
1
, whereas numerals
3
b
and
4
b
denote an input terminal and an output terminal for the audio signal variable delay circuit
2
, respectively. Further, reference numeral
101
denotes a video signal input through the input terminal
3
a
(hereinafter, a video input signal),
102
denotes an video signal to be output through the output terminal
4
a
(hereinafter, a video output signal),
103
denotes an audio signal input through the input terminal
3
b
(hereinafter, an audio input signal),
104
denotes an audio signal to be output through the output terminal
4
b
(hereinafter, an audio output signal) and reference numeral
105
denotes a delay control signal fed to the audio signal variable delay circuit from the frame synchronizing circuit
1
.
The operation of the conventional frame synchronizer is now explained below.
Recently, there have been employed various frame synchronizers in TV broadcasting stations for the purpose of synchronizing video signals and corresponding audio signals, wherein each frame synchronizer is configured basically by a frame synchronizing circuit
1
and an audio signal variable delay circuit
2
as shown in FIG.
7
.
The frame synchronizing circuit
1
above is generally provided with a plurality of frame memories, and the write operation to each of these frame memories is conducted in synchronization with the corresponding video input signal
101
, whereas the read operation is carried out through a reference synchronization within individual stations. On this occasion, in a case that the frame signals stored within the frame memories are read out one after another, if there comes a moment at which none of the signals therein has been read out yet, then one of the frames is deleted, whereas if there comes a moment at which there are no signals left which have not been read out yet, one of the frames is read out again, so as to effectuate the frame synchronizing function.
Further, in order to adjust the timing discrepancy between a video output signal
102
which is read out from the frame memory to be output to the output terminal
4
a
and an audio output signal
104
which is to be output from the output terminal
4
b
, the frame synchronizing circuit
1
delays a corresponding audio input signal
103
input through the input terminal
3
b
by sending a delay control signal
105
to the audio signal variable delay circuit
2
, and outputs the thus synchronized audio output signal to the output terminal
4
b
as an audio output signal
104
. On this occasion, the audio input signal
103
is delayed in the audio signal variable delay circuit
2
for a certain time period equivalent to the difference between the write timing to the frame memory and the read timing therefrom.
It is to be noted that there have been published various reference documents related to the frame synchronization such as: Japanese Patent Application Laid-Open No. 5-276158, which discloses that in case one of the video and audio signals is delayed for more than a predetermined time period, the delayed signal data is deleted; Japanese Patent Application Laid-Open No.6-121276, which discloses that when a video signal is delayed with respect to a corresponding audio signal, the processing of that video signal frame is suspended and the following video signal is processed first; Japanese Patent Application Laid-Open No.7-177479, which discloses that even if there occurs an error in the synchronization, it can be restored correctly due to the time stamp provided to both video and audio signals; and further, Japanese Patent Application Laid-Open No.8-261574, which discloses that an audio signal is delayed in accordance with the delayed amount of a corresponding video signal so as to be synchronized with each other.
Since the conventional frame synchronizer is configured as such, the timing discrepancy between a video signal and a corresponding audio signal has to be adjusted in the audio signal variable delay circuit
2
, and it is required to suitably delete or repeat this audio signal in order to synchronize it with a reference synchronization within individual stations, so that there has been such a problem that the sequence (or succession) of a sound is interrupted when the deletion or repetition of audio signals is conducted.
Further, the timing for deleting a frame or repeating the same frame twice in the frame synchronizing circuit
1
is based on the occupied state of the memory, so that there has been such a problem that the successive motion of a picture image is interrupted when the deletion or twice reading of one frame is carried out.
SUMMARY OF THE INVENTION
The present invention has been proposed to solve the problems aforementioned, and it is an object of the present invention to provide a frame synchronizer capable of eliminating interruption in the sequence of a sound.
It is another object of the present invention to provide a frame synchronizer capable of eliminating interruption in the successive motion of a picture image.
In order to achieve the above object, a frame synchronizer according to the first aspect of the present invention comprises: a frame synchronizing means for storing input video signals of a plurality of frames, and outputting the stored video signals one after another; an input/output frame phase difference detection means for detecting a phase difference between a video signal input frame pulse used for storing each of the input video signals in the frame synchronizing means and a video signal output frame pulse used for reading out each of the stored video signals from the frame synchronizing means, a video signal read control means for generating a read control signal for controlling the frame synchronizing means in such a manner as to read out the video signal of a frame other than that of the target frame which was to be read out otherwise, when the input/output phase difference detected by the input/output frame phase difference detection means comes up to an amount of one frame, an audio signal output clock generating means for generating an audio signal output clock in synchronization with a video signal output clock which is used, together with the video signal output frame pulse, for reading out the video signals from the frame synchronizing means, and a sampling rate converting means for converting the sampling rate of the audio input signal to that corresponding to the audio signal output clock, and outputting the input audio signal whose sampling rate has been converted as an audio output signal.
A frame synchronizer according to a second aspect of the present invention comprises: a video signal rearranging means for storing input video signals of a plurality of frames, rearranging the order of the frames, and outputting each of the frames whose order has thus been rearranged, an input/output frame phase difference detection means for detecting a phase difference between a video signal input frame pulse used for inputting each of the video signals to the video signal rearranging means and a video signal output frame pulse used for outputting each of the video signals from the video signal rearranging means, a video signal read control means for generating a read control signal for controllin

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