Frame synchronization device for a synchronous digital bit strea

Pulse or digital communications – Spread spectrum – Direct sequence

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375114, H04L 708

Patent

active

049439855

ABSTRACT:
A frame synchronization device for a synchronous digital bit stream divided into blocks by means of a block code and structured in frames comprises a frame alignment word configuration recognition circuit generating for each recognized configuration a recognition signal that is directed to a frame alignment acquisition control circuit through the intermediary of a configuration selection circuit. This circuit operates under the control of a time window definition circuit driven by a block timebase and a frame timebase and is adapted to select only recognition signals corresponding to alignment word configurations correctly placed relative to the blocks. The sorting done by the configuration selector eliminates most imitation alignment words and therefore accelerates significantly the synchronization process.

REFERENCES:
patent: 3641274 (1972-02-01), Sasaki et al.
patent: 4107608 (1978-08-01), Saburi
patent: 4641326 (1987-02-01), Tomisawa
patent: 4811367 (1989-03-01), Tajika
patent: 4829518 (1989-05-01), Iguchi et al.

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