Multiplex communications – Wide area network – Packet switching
Patent
1987-04-01
1988-08-30
Griffin, Robert L.
Multiplex communications
Wide area network
Packet switching
370106, 375116, H04J 306
Patent
active
047681926
ABSTRACT:
A frame synchronization detection system which enables frame synchronization and synchronizing pulses to be provided from at least two formats of DS1 TDM signals, specifically the D4 and extended superframe Fe formats. A first search logic circuit provides an output indicating the onset of a maintenance mode of frame detection when either Fe or D4 patterns are decoded. For the D4 pattern an alternate pattern is decoded and the first search circuit enters the maintenance mode only after both alternate D4 framing patterns are decoded. A second search logic circuit enables the decoding of a subsequent sequence and detection of framing, thereby reducing the probability of false framing. A frame counter which is synchronized upon the detection of a valid framing pattern by the first search circuit continues to supply frame sync pulses until an error detector, which detects whether a predetermined ratio of invalid to valid framing bits occurs, resets the system back to the search mode.
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Eu Jai H.
Pattavina Jeffrey S.
Chin Stephen
General Signal Corp.
Griffin Robert L.
Lukacher Martin
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