Pulse or digital communications – Spread spectrum – Direct sequence
Patent
1991-02-05
1992-08-18
Safourek, Benedict V.
Pulse or digital communications
Spread spectrum
Direct sequence
375106, H04L 0700, H04J 0306
Patent
active
051406187
ABSTRACT:
In a frame synchronization circuit, a serial data signal, which includes a frame synchronization code constituted by an M number of bits in one frame, is converted by a serial/parallel converting circuit to a parallel data signal of a 2M-1 number of bits. An M number of pattern detectors of a first synchronization detecting circuit detect the code pattern of the first block of the frame synchronization code from the parallel data signal. A selection signal generating circuit holds outputs of the pattern detectors, and outputs them as a selection signal designating the bit position allotted to the pattern detector which detects the synchronization code pattern. An output of the serial/parallel converting circuit is delayed by a time required for the above-mentioned processing, and supplied to a selector, which selectively outputs an M-bit data signal corresponding to the bit position designated by the selection signal.
REFERENCES:
patent: 4748623 (1988-05-01), Fujimoto
patent: 4920546 (1990-04-01), Iguchi et al.
Patent Abstracts of Japan, vol. 13, No. 53, (E-713) [3401], Feb. 7, 1989; & JP-A-63 245 032 (Fujitsu) Dec. 10, 1988.
Atsumi Takehiko
Ibe Hiroyuki
Ishibashi Hideki
Kinoshita Osamu
Mori Takako
Ghebretinsae Temesghen
Kabushiki Kaisha Toshiba
Safourek Benedict V.
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