Multiplex communications – Pathfinding or routing – Switching a message which includes an address header
Reexamination Certificate
1998-03-19
2001-05-01
Chin, Wellington (Department: 2664)
Multiplex communications
Pathfinding or routing
Switching a message which includes an address header
C370S428000
Reexamination Certificate
active
06226292
ABSTRACT:
CROSS REFERENCE TO RELATED APPLICATIONS
None
STATEMENT REGARDING FEDERALLY SPONSORED RESEARCH OR DEVELOPMENT Not Applicable
BACKGROUND OF THE INVENTION
The invention is related to the field of data networks, and more particularly to the replication of multicast frames in a computer network switch.
Network switches generally include input and output ports to which network links are attached, a switching fabric for selectively forwarding data frames received at an input port to an output port, and data buffers used to compensate for different data rates at various points within the switch. In one configuration receive buffers are placed between the input ports and the fabric, and transmit buffers are placed between the fabric and the output ports. Among other functions, the buffers compensate for differences between the high instantaneous data bandwidth of the fabric and the relatively low instantaneous bandwidth of the ports.
Many network switches are capable of forwarding “unicast” and “multicast” frames. A unicast frame is a frame which is forwarded to a single destination address. A multicast frame, in contrast, is forwarded to two or more destinations.
Multicast operation can cause the slowdown of data traffic in the switch, because a single receive port temporarily monopolizes two or more transmit ports, making them unavailable to transmit frames received by other receive ports. The receive and transmit buffers enable the switch to receive additional frames when multicast frames are being serviced. These received frames can then be transmitted when the desired transmit ports become available. However, the accessibility of these buffers, especially the transmit buffers, diminishes as a multicast frame is replicated to all the required ports. It is therefore desirable that the rate at which data is transmitted from the fabric into the transmit buffers be reducible to accommodate multicast operation. One of the challenges in the design of switch data paths is to achieve generally high data transfer rates across the fabric, while enabling the data transfer rate to be reduced as needed to accommodate multicast operation.
One known technique for achieving these goals is to interpose a buffer large enough to hold a maximum-size frame between the fabric and the transmit buffers. This intermediate buffer is used to accumulate an entire frame from the fabric at the maximum data rate. The frame stored in this buffer is then written to the transmit buffers as required. In the case of a unicast frame the frame is written to a single transmit buffer. In the case of a multicast frame the frame is written to a transmit buffer associated with each port through which the frame is to be forwarded. No data is transferred from the fabric until the transmit buffers have written. When writing is complete, data is again allowed to flow from the fabric, and the buffer is freed for use by subsequent frames.
The above approach suffers from two drawbacks. One drawback is the large size of the intermediate buffer. The buffer must be able to hold a maximum-size frame, which can be, for example, approximately
1
.
5
kilobytes (KB) in a Fast Ethernet network. Such a large buffer can consume substantial area within integrated circuits that are used to implement part or all of the data path on the transmit side of the fabric. Another drawback is the delay incurred in filling and emptying the intermediate buffer. It would therefore be desirable to provide an interface between the fabric and the transmit buffers that enables high speed data transfer and that supports both unicast and multicast operation while avoiding the aforementioned problems.
BRIEF SUMMARY OF THE INVENTION
In accordance with the present invention, a network switch is disclosed in which transmit buffers are used to temporarily store data frames being transmitted, and multicast frames are replicated and stored in multiple transmit buffers for transmission on corresponding network links. A memory containing the transmit buffers is operated in different modes for unicast and multicast frames. A single overall timing format is used in both modes, while the sequences of addresses and data supplied to the buffer memory are different in the two modes. No large frame-sized buffer is required in the transmit data path. Integrated circuit die area and frame transmission delays are therefore minimized.
In the presently disclosed switch, write and read phases for the transmit buffer memory are defined. The write and the read phases both last several cycles, so that several word locations in the memory are written to or read from the memory during the respective phase. When a unicast frame is being transferred from the fabric to the transmit buffer memory, multi-word segments of the frame are written into one of the transmit buffers during successive write phases, each segment being written during a write phase at a high data rate. The rate is preferably high enough to enable the transmit buffer memory to absorb streams of unicast frames from twelve receive ports substantially indefinitely, so that the overall operating data rate of the network links is maximized.
Multicast frames are selectively written in a time-sliced manner into specified ones of the transmit buffers. Words of the multicast frame are written into multiple transmit buffers during successive write phases, each word being written to all the necessary transmit buffers in a given write phase by supplying the data word to the memory data input and sequentially addressing the buffers. Preferably the buffers are selected during each write phase at the same rate at which the words of a frame segment are written during unicast operation. If the rates are the same, and if the segment size in words is equal to the number of transmit buffers, then the overall timing of the write phase in each case is the same. Accordingly, control of the writes to the transmit buffer is simplified. During frame replication the data rate from the fabric is reduced to substantially one word per write phase, so that only minimal buffering is required in the transmit data path.
Other aspects, features, and advantages of the present invention are disclosed in the detailed description which follows.
REFERENCES:
patent: 5724351 (1998-03-01), Chao et al.
patent: 5802052 (1998-09-01), Venkataraman
3Com Corporation
Chin Wellington
Jones Prenell
Weingarten, Schurgin Gagnebin & Hayes LLP
LandOfFree
Frame replication in a network switch for multi-port frame... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Frame replication in a network switch for multi-port frame..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Frame replication in a network switch for multi-port frame... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2469972