Active solid-state devices (e.g. – transistors – solid-state diode – Lead frame
Reexamination Certificate
2001-05-07
2004-06-01
Wilson, Allan R. (Department: 2815)
Active solid-state devices (e.g., transistors, solid-state diode
Lead frame
C257S667000, C257S669000, C257S673000, C257S676000, C257S773000, C257S787000, C257S797000, C438S123000, C438S124000
Reexamination Certificate
active
06744118
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a frame for semiconductor package in which a semiconductor device is mounted on a lead frame and the outside thereof, particularly the upper surface of semiconductor device is encapsulated with molding compound.
2. Description of the Prior Art
In recent years, it has been required to miniaturize and shape semiconductor products mounted on a substrate so as to be thinner, as the packaging of a semiconductor is more dense. It is also required for LSI to reduce the number of chips by improving integration level and to miniaturize and make a package lighter. The popularization of so-called CSP (Chip Size Package) is rapidly advancing. Particularly, in the development of a thin semiconductor product with a lead frame, the semiconductor package of the single side encapsulation type has been developed in which a semiconductor device is mounted on a lead frame and the surface of the semiconductor device mounted on a lead frame is encapsulated with molding compound.
FIG. 1
is a sectional view of one example of a semiconductor package.
FIG. 2
is a plan view thereof. The semiconductor package shown in
FIGS. 1 and 2
is comprised of a lead frame
1
, a semiconductor device
4
mounted on die-pad
3
supported with suspending leads
2
of lead frame
1
, metallic thin wires
6
electrically connecting electrodes provided on the top face of the semiconductor device
4
with terminals
5
of lead frame
1
, and molding compound
7
for encapsulating the outside region of semiconductor device
4
including the upper side of semiconductor device
4
and the lower side of die-pad
3
. The semiconductor package is of the non-lead type in which so-called outer leads do not project from the semiconductor package and the two inner leads and outer leads are integrated into terminals
5
, wherein used lead frame
1
is half-cut by etching in such a manner that die-pad
3
is positioned higher than terminals
5
. Since such a step is formed between die pads
3
and terminals
5
, molding compound
7
can be inserted into the lower side of die-pad
3
so that a thin semiconductor package can be realized even though the semiconductor package has a non-exposed die-pad.
Since the semiconductor device is miniature, a matrix type frame is mainly used for the above-mentioned semiconductor package of the non-lead type, in which plural semiconductor devices are arranged in a direction of a width of the matrix type frame. Further, recently, due to a demand for lower costs, one thought is to switch from a frame with individual-type molding shown in
FIGS. 3A and 3B
to a frame with collective-type molding as shown in
FIGS. 4A and 4B
.
In the frame shown in FIG.
3
(A), individual molding cavities C of small size are provided separately within a frame F. After molding, individual semiconductor packages are stamped out so that semiconductor packages S shown in FIG.
3
(B) are obtained. Namely, semiconductor devices are mounted on die-pads of lead frames through silver paste and others, and wire bonding is carried out. Thereafter, respective semiconductor devices are individually molded with molding compound and the respective molded semiconductor devices are stamped out to form individual semiconductor packages.
In the frame of the collective molding type, as shown in FIG.
4
(A), some molding cavities C of large size are provided within a frame F. Multiple semiconductor devices are arranged in a matrix within each molding cavity C, respectively and collectively molded with molding compound. Thereafter, the collectively molded semiconductor devices are cut at grid-leads L by means of a dicing saw so that a semiconductor package S shown in FIG.
4
(B) is obtained. Namely, semiconductor devices are mounted on die-pads of lead frames through silver pastes and others and wire bonding is carried out. Thereafter, plural semiconductor devices are collectively molded with molding compound to a given cavity size, and then the collectively molded semiconductor devices are cut to form individual semiconductor packages by dicing.
The above-mentioned frame of the collective molding type has the advantage that multiple resin-encapsulated packages can be produced all at once, therefore the productive efficiency is high. However, when collectively molded semiconductor devices are cut to form individual packages by means of a dicing saw, molding compound and metallic lead frames are cut at the same time, and burrs of metal from the lead frame project a long distance towards adjacent terminals which causes short circuiting. Further, there is a problem that metal powders and dust are generated and pollute the environment. Further, the dicing saw is apt to wear out since metal is shaved with the dicing saw.
BRIEF SUMMARY OF THE INVENTION
An object of the present invention is to provide a frame for a semiconductor package of the collective molding type used for the production of a semiconductor package, in which burrs of metal generated when cutting molded resin and metal of the lead frame by means of a dicing saw are reduced and the generation of metal dust is inhibited, and the wear of the dicing saw is reduced.
In order to achieve the above-mentioned object, a frame for a semiconductor package of the present invention comprises plural lead frames arranged in a matrix through grid-leads, in which individual semiconductor devices are mounted on the individual lead frames, respectively, the semiconductor devices are collectively molded with molding compound and the collectively molded semiconductor devices are cut at grid-leads by means of a dicing saw to obtain individual semiconductor packages, wherein the grid-leads are provided with groove portions which are formed by half-cutting by etching areas of the frame for the semiconductor package corresponding to the grid-leads from the front or back thereof in such a manner that thin grid-leads are formed.
In the above-mentioned lead frame, a width of groove portions may be larger or smaller than the width of the dicing saw.
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Copy of U.S. application Ser. No. 09/850 213, filed May 7, 2001, Chikao Ikenaga and Kouji Tomita, Inventors, Including specification, claims and drawings.
Ikenaga Chikao
Tomita Kouji
Dainippon Printing Co., Ltd.
Flynn ,Thiel, Boutell & Tanis, P.C.
Ortiz Edgardo
Wilson Allan R.
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