Frame buffer with matched frame rate

Details Frame buffer with matched frame rate Frame buffer with matched frame rate

1991-07-18

1995-09-05

Chin, Tommy P.

Computer graphics processing and selective visual display system

Plural display systems

Diverse systems

345103, 345201, G09G 500

Patent

active

054482577

ABSTRACT:
A frame buffer architecture for a graphics controller provides for conversion of cathode ray tube (CRT) data streams to multi-segment data streams. The buffer architecture operates such that the CRT frame rate is the same as the multi-segment frame rate. In so doing, a graphics controller can operate within its intended specification while operating at the same clock frequency whether in CRT or multi-segment mode. In addition, this architecture overcomes the other problems associated with prior art graphics controllers.

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