Computer graphics processing and selective visual display system – Plural physical display element control system – Display elements arranged in matrix
Reexamination Certificate
2005-06-28
2005-06-28
Chow, Dennis-Doon (Department: 2675)
Computer graphics processing and selective visual display system
Plural physical display element control system
Display elements arranged in matrix
C345S092000, C349S042000
Reexamination Certificate
active
06911964
ABSTRACT:
An enhanced frame buffer pixel circuit with two control transistors and a separate capacitor put in as a memory capacitor before the memory transistor yields a high contrast ratio by removing induced charge and solving a charge sharing problem between the memory capacitor and the liquid crystal display (LCD) capacitor. The memory transistor may be made of either CMOS or PMOS. The frame buffer pixel can be used to drive binary displays which expresses ON and OFF only if a comparator is put in after the pixel electrode circuit to represent gray levels with reduced sub-frame frequency.
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Johnson Kristina M.
Lee Sang-rok
Morizio James C.
Chow Dennis-Doon
Duke University
Fleshner & Kim LLP
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