Frame buffer control method and circuit

Details Frame buffer control method and circuit Frame buffer control method and circuit

1998-02-05

2000-01-11

Evans, Arthur G.

Facsimile and static presentation processing

Static presentation processing

Memory

358 117, G06K 1500

Patent

active

060142251

ABSTRACT:
A frame buffer control circuit interchanges at least one row address bit with at least one column address bit. In operations such as access to bit-mapped character data, the interchange reduces the number of different row addresses that have to be generated, thereby speeding up access to the frame buffer.

REFERENCES:
patent: 5068904 (1991-11-01), Yamazaki

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