Fractional N synthesizer with reduced fractionalization spurs

Details Fractional N synthesizer with reduced fractionalization spurs Fractional N synthesizer with reduced fractionalization spurs

2005-07-05

2005-07-05

Liu, Shuwang (Department: 2634)

Pulse or digital communications

Pulse width modulation

C375S376000, C375S373000, C375S327000, C332S109000

Reexamination Certificate

active

06914935

ABSTRACT:
A fractional N synthesizer is disclosed. The synthesizer includes a phase detector that receives first and second input signals and generates a pulse width modulated (PWM) output signal having a pulse width indicative of the phase relationship between the input signals. A pulse-width-to-amplitude (PW/A) conversion circuit connected to a loop filter where the conversion circuit receives the phase detector output signal and generates a PW/A output signal having an amplitude indicative of the phase detector output signal pulse width. The phase detector output signal may comprise a periodic series of pulses having varying pulse widths and the PW/A output signal amplitude changes at the end of each pulse to reflect the corresponding pulse width. The conversion circuit may include a current circuit connected to a capacitor, where the current signal receives the phase detector output and sources a constant current during a charging phase of the phase detector output signal.

REFERENCES:
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patent: 6630868 (2003-10-01), Perrott et al.
U.S. Appl. No. 60/217,208, Perrott, filed Jul. 2000.

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