Fractional-N phase-locked loop

Details Fractional-N phase-locked loop Fractional-N phase-locked loop

2010-01-20

2011-11-08

Donovan, Lincoln (Department: 2816)

Miscellaneous active electrical nonlinear devices, circuits, and

Signal converting, shaping, or generating

Synchronizing

C327S147000, C327S148000, C327S158000

Reexamination Certificate

active

08054114

ABSTRACT:
A fractional-N phase-locked loop (PLL) includes a phase detector, a voltage-controlled oscillator (VCO), a frequency divider and a frequency multiplier with a multiplication factor of a mixed number. The phase detector compares phase difference between a reference frequency and a divided signal from the frequency divider. The voltage-controlled oscillator generates the output frequency according to the phase difference. The frequency multiplier performs frequency multiplication on the output frequency to generate a multiplied signal, and the frequency multiplier comprises a second phase-locked loop, to form a second loop. The frequency divider performs frequency division on the multiplied signal to generate the divided signal. The divided signal and the reference frequency are compared by the phase detector to determine the phase difference.

REFERENCES:
patent: 6559698 (2003-05-01), Miyabe
patent: 7301404 (2007-11-01), Mattisson
patent: 2008/0265998 (2008-10-01), Wood

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