Fractional N frequency synthesis with residual error correction

Details Fractional N frequency synthesis with residual error correction Fractional N frequency synthesis with residual error correction

1993-10-29

1996-02-27

Pascal, Robert J.

Oscillators

Automatic frequency stabilization using a phase or frequency...

Afc with logic elements

331 10, 331 25, 331 16, 455 76, 455260, 375376, 327156, 327159, 327105, 327107, H03C 309, H03L 7197

Patent

active

054952069

ABSTRACT:
A frequency synthesizer (107) utilizes a variable oscillator (114) the output of which is used as the frequency synthesizer output (115) and is fed to a digital divider (108). The output of the digital divider (108) feeds one input of a phase comparator (109). The other input of the phase comparator (109) is fed from a reference oscillator (116). A phase comparator (109) output controls the variable oscillator (114). The digital divider (108) has a division ratio that is varied with time by a multi accumulator fractional-N division system (112) such that the effective division ratio may be varied by non-integer steps. Due to the time varying division sequence applied to the digital divider (108) there is a residual spurious level on the output signal (115). A second digital sequence from the multiple accumulator fractional. N-division system (112) is generated to reduce this spurious level and is applied to the output of the phase comparator (109).

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