Oscillators – Combined with particular output coupling network
Reexamination Certificate
2011-06-28
2011-06-28
Cho, James H. (Department: 2819)
Oscillators
Combined with particular output coupling network
C331S00100A, C331S016000, C331S044000, C331S176000, C327S117000, C327S156000
Reexamination Certificate
active
07969251
ABSTRACT:
A divider control circuit includes a first and a second delta sigma modulator configured to generate a divider control signal for a fractional-N divider and a fractional signal indicative of a phase error in the divider output. The fractional signal is supplied for control of an interpolator circuit. The divider control circuit may be implemented as a look-ahead circuit where two or more divider control signals and fractional signals are generated during a single cycle to allow the divider control circuit to be run at a reduced clock rate.
REFERENCES:
patent: 5777524 (1998-07-01), Wojewoda et al.
patent: 5986512 (1999-11-01), Eriksson
patent: 6236703 (2001-05-01), Riley
patent: 6351485 (2002-02-01), Soe et al.
patent: 6563448 (2003-05-01), Fontaine
patent: 6703901 (2004-03-01), Jovenin et al.
patent: 6972635 (2005-12-01), McCorquodale et al.
patent: 7042258 (2006-05-01), Booth et al.
patent: 7050525 (2006-05-01), Adachi et al.
patent: 7068110 (2006-06-01), Frey et al.
patent: 7181180 (2007-02-01), Teo et al.
patent: 7271666 (2007-09-01), Melanson
patent: 7345549 (2008-03-01), Xu
patent: 7417510 (2008-08-01), Huang
patent: 2004/0232995 (2004-11-01), Thomsen et al.
patent: 2004/0247027 (2004-12-01), Wang
patent: 2006/0139102 (2006-06-01), Tucholski
patent: 2008/0315963 (2008-12-01), Huang
patent: 0683558 (1995-11-01), None
patent: 2004088846 (2004-10-01), None
Allen, Daniel J. and Carley, Adam L., “Free-Running Ring Frequency Synthesizer,” 2006 IEEE International Solid-State Circuits Conference, Feb. 7, 2006, pp. 380-381.
Dai, Fa Foster et al., “A Direct Digital Frequency Synthesizer with Fourth-Order Phase Domain .DELTA..SIGMA. Noise Shaper and 12-bit Current-Steering DAC,” IEEE Journal of Solid-State Circuits, vol. 41, No. 4, Apr. 2006, pp. 839-850.
Meninger, Scott E. and Perrott, Michael H., “A 1-MHZ Bandwidth 3.6GHz 0.18-.mu.m CMOS Fractional-N Synthesizer Utilizing a Hybrid PFD/DAC Structure for Reduced Broadband Phase Noise,” IEEE Journal of Solid-State Circuits, vol. 41, No. 4, Apr. 2006, pp. 966-980.
Yang, Chin-Yuan et al., “A High-Frequency Phase-Compensation Fractional-N Frequency Synthesizer,” IEEE International Symposium on Circuits and Systems, 2005 ISCAS, May 23-26, 2005, pp. 5091-5094.
Analog Devices, ADF4157 “High Resolution 6 GHz Fractional-N Frequency Synthesizer,” 2007-2008, 24 pages.
Heng, Chun-Huat and Song, Bang-Sup, “A 1.8-GHz CMOS Fractional-N Frequency Synthesizer with Randomized Multiphase VCO,” IEEE Journal of Solid-State Circuits, vol. 38, No. 6, Jun. 2003, 7 pages.
Miletic, Igor and Mason, Ralph, “Bandwidth Expansion in Sigma-Delta PLLs Using Multiphase VCOs,” IEEE Canadian Conference on Electrical and Computer Engineering, CCECE, May 2006, pp. 971-974.
Fu Zhuo
Hara Susumu
Cho James H.
Lo Christopher
Silicon Laboratories Inc.
Zagorin O'Brien Graham LLP
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