FPLL with third multiplier in an analog input signal

Demodulators – Phase shift keying or quadrature amplitude demodulator – Input signal combined with local oscillator or carrier...

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Details

329309, 331 1A, 331 12, 331 23, 348726, H03L 7087, H04L 27227

Patent

active

060695242

ABSTRACT:
A FPLL has an I, a Q and a third multiplier, with the I multiplier supplying demodulated signals to a limiter and the Q multiplier supplying signals to a loop filter. A VCO and phase shift circuit supply quadrature signals to the I and Q multipliers. The analog input signal is applied to the I multiplier and to the third multiplier. The third multiplier, which is located in an AC path in the loop to avoid the effects of offsets due to stray DC voltages and currents, is also supplied with the digital output of the limiter. The third multiplier supplies its output to the Q multiplier.

REFERENCES:
patent: 5745004 (1998-04-01), Mycynek et al.

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