FPLL with third multiplier in an AC path in the FPLL

Demodulators – Phase shift keying or quadrature amplitude demodulator – Input signal combined with local oscillator or carrier...

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Details

329309, 331 1A, 331 12, 331 23, 348726, H03L 7087, H04L 27227

Patent

active

057450048

ABSTRACT:
A FPLL has first second and third multipliers with the first multiplier supplying demodulated signals to a limiter and the second multiplier supplying signals to the loop filter. A VCO and phase shift circuit supply quadrature signals to the first multiplier and to the third multiplier which is relocated to an AC path in the loop to avoid the effects of offsets due to stray DC voltages and currents. The limiter output is applied to the third multiplier. The third multiplier supplies its output to the second multiplier. An integrated circuit embodiment using an exclusive OR gate as the third multiplier is also shown.

REFERENCES:
patent: 4072909 (1978-02-01), Citta
patent: 4091410 (1978-05-01), Citta
patent: 4755762 (1988-07-01), Citta et al.

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