FPGA redundancy

Details FPGA redundancy FPGA redundancy

1995-05-12

1998-07-07

Teska, Kevin J.

Boots, shoes, and leggings

364181, 36418301, 364490, 364491, 371 222, H03K 19177, H04B 1700

Patent

active

057778876

ABSTRACT:
An FPGA includes primary resources and redundant resources. To program an FPGA to perform a desired function, a pattern of programmable elements to be programmed that takes advantage of primary resources only is first prepared. This pattern is then modified responsive to previously obtained information about defects within the FPGA. The modified pattern takes advantage of redundant resources as direct or indirect substitutes for FPGA elements rendered unusable by defects. The FPGA is programmed in accordance with the modified pattern.

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Kuo, Sy-Yen, "Spare Allocation and Reconfiguration in Large Area VLSI" 1988 IEEE pp. 609-612.
Upadhyaya, Shombhu,"On the Repair of Defective Field Programmable Logic Arrays to Increase Yield" 1987 IEEE pp. 234-237.
Moore, Will, "A Review of Fault-Tolerant Techniques for the Enhancement of Integrated Circuit Yield" 1986 IEEE pp. 684-698.

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