Four quadrant multiplying divider using three log circuits

Details Four quadrant multiplying divider using three log circuits Four quadrant multiplying divider using three log circuits

1974-07-02

1976-02-24

Ruggiero, Joseph F.

Registers

Transfer mechanism

Traveling pawl

235194, 235197, 328145, G06G 716

Patent

active

039406032

ABSTRACT:
Three log circuits are fed by respective x, y and z inputs, along with predetermined interconnections therebetween. The outputs from the log circuits are log z, log (x+z) and log (y+z). These outputs are fed to summing and anti-log circuits to derive the equation (xy)/z + x + y + z. A second summing circuit is provided for substracting the three variables from the resultant output so that (xy)/z is finally derived.

REFERENCES:
patent: 3197626 (1965-07-01), Platzer, Jr.
patent: 3453423 (1969-07-01), Pu-Yuan Ma
patent: 3532868 (1970-10-01), Embley
patent: 3676661 (1972-07-01), Sprowl

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