Four-quadrant multiplier for operation of MOSFET devices in...

Details Four-quadrant multiplier for operation of MOSFET devices in... Four-quadrant multiplier for operation of MOSFET devices in...

1997-12-05

2001-03-27

Wells, Kenneth B. (Department: 2816)

Miscellaneous active electrical nonlinear devices, circuits, and

Specific input to output function

Combining of plural signals

C327S359000, C455S333000

Reexamination Certificate

active

06208192

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a four-quadrant multiplier circuit and a squarer circuit. In particular, the invention relates to four-quadrant multiplier and squarer circuits which have an improved input range and better frequency and improved frequency response by exploiting the squarer-law characteristics of MOS transistors biased in the saturation region.
2. Description of the Prior Art
Four-quadrant multipliers are well known circuits which are often used as building blocks in larger circuit arrangements, such as adaptive filters, frequency doublers, and modulator circuits. In 1974, B. Gilbert proposed a bi-polar junction transistor (BJT) based multiplier, employing Gilbert cells. The proposal issued in an article “A High Performance Monolithic Multiplier Using Active Feedback,” IEEE Journal Of Solid State Circuits, SC 9, pp. 264-377. In 1982, D. C. Soo and R. G. Meyer used the Gilbert cell concept to design a n-channel metal-oxide-semiconductor (NMOS) four-quadrant multiplier. However, Gilbert cells consume large amounts of power and provide a limited input range.
Accordingly, S. I. Liu et al. designed a complementary metal-oxide-semiconductor (CMOS) four-quadrant multiplier, using squarer-law characteristics of metal-oxide-semiconductor field effect transistors (MOSFETs) operating in their saturation region. This design was published in 1993 in the Electronics Letter, Vol. 29, pp. 1737-1738. In the same year, S. I. Liu et al. also described the design of a multiplier using the characteristics of MOSFETs in their linear region, in an article entitled “Non-Linear Circuit Applications With Current Conveyors,” IEEE Proceedings-G, Vol. 140, pp. 1-6.
As discussed above, analog multipliers have been proposed which employ the characteristics of MOS devices operating in both the saturation and the linear regions. The use of MOS devices reduces power consumption, as compared to the use of bi-polar junction transistors. However, utilizing MOS transistors which are biased to operate in a linear region allows only a small input range, and provides poor frequency response. Therefore, traditional CMOS multipliers have only a narrow input range and poor frequency response, which must be improved without increasing power consumption or manufacturing costs of the multipliers.
SUMMARY AND OBJECTS OF THE INVENTION
It is an object of the invention to provide an improved four-quadrant squarer circuit based upon the square-law characteristic of metal oxide-semiconductor field effect transistors (MOSFETs). It is another object of the invention to provide an improved multiplier circuit based upon the square-law operating characteristics of MOSFETs.
It is known in the art that a MOSFET device, operating in the saturation region, has a current-voltage transfer function which follows the square law. More specifically, the drain current I
d
of a field effect transistor operating in the saturation region is proportional to (V
GS
-V
T
)
2
, where V
T
is the gate threshold voltage at which drain current begins and V
GS
is the voltage between the gate and the source of the transistor. This square-law operating characteristics of MOSFETs can be employed to realize the general mathematical formula (A+B)
2
−(A−B)
2
=4AB. Accordingly, a simple circuit employing the square-law operating characteristics of MOSFET devices will be able to provide both a squarer and a multiplier which are suitable for high frequency operation.
According to the invention, a CMOS four-quadrant multiplier is provided which is arranged to keep the operating transistors fixed in the saturation region, so that they continuously operate according to the square law described above. Further, the circuit allows the transistors to operate in the saturation region with even a wide range of input.


REFERENCES:
patent: 5187682 (1993-02-01), Kimura
patent: 5774010 (1998-06-01), Kimura
patent: 5805007 (1998-09-01), Colli
patent: 5886560 (1999-03-01), Kimura

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