Four mode microcomputer power save operation

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Details

364900, G06F 104

Patent

active

043171818

ABSTRACT:
A calculator having constant memory utilizing a low power microcomputer with on-chip memory capability, and multiple partition power control of circuit groups. Incorporation of a first and second switched negative voltage and a non-switched negative voltage enables the power hungry clocked logic and the display interface and keystroke detect circuitry, to be turned off while power is maintained on the internal static RAM, and on the RAM write logic, digit latches, and R-lines which connect to both the internal RAM, or to selectively connect in combination the first and second switched voltages. In an alternate embodiment, a multiple oscillator, multiple partition system is controlled to provide an off-mode, display only mode (low frequency oscillator), a process only mode, and a display and process mode, thereby optimizing power dissipation to system requirements. Thus, semi-non-volatile memory (constant memory) capability, power down standby, and display only, capabilities may be achieved. Power consumption less than conventional CMOS is obtainable.

REFERENCES:
patent: 3453601 (1969-07-01), Bogert et al.
patent: 3941989 (1976-03-01), McLaughlin et al.
patent: 4218876 (1980-08-01), Hashimoto et al.

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