Boots – shoes – and leggings
Patent
1991-08-16
1994-06-07
Dixon, Joseph L.
Boots, shoes, and leggings
364243, 3642431, 364247, 3642471, 3642474, 3642475, 3642477, 364258, 364260, 364DIG1, G06F 1200
Patent
active
053197577
ABSTRACT:
A microprocessor for facilitating use of FORTH computer language includes a top register for storing a first parameter and an Arithmetic logic unit (ALU) connected to the top register for processing the first parameter with other parameters and for storing the results in the top register. An index register stores a second parameter and addresses main memory and pops and pushes the second parameter with respect to a return Last in/first out (LIFO) stack. A next parameter register stores a third parameter and pops andpushes the third parameter with respect to a next parameter LIFO stack. Anh addressing multiplexer is coupled to the index register and the next parameter register. A first swap connection to the top and index registers enables single cycle exchange of the first and second parameters between these two registers. A second swap connection between these registers permits a single cycle exchange of the first parameter and the third parameter between the top and next parameter registers. The memory, return LIFO, stack and next parameter LIFO stack comprise discrete and separate memory areas not accessible.
REFERENCES:
patent: 3601809 (1971-08-01), Gray et al.
patent: 3965335 (1976-06-01), Ricci et al.
patent: 4041462 (1977-08-01), Davis et al.
patent: 4128878 (1978-12-01), Yasuhara et al.
patent: 4156796 (1979-05-01), O'Neal et al.
patent: 4200930 (1980-04-01), Rawlings et al.
patent: 4362926 (1982-12-01), Dakouski et al.
patent: 4390946 (1983-06-01), Lane
patent: 4393468 (1983-07-01), New
patent: 4458325 (1984-07-01), Nakata et al.
patent: 4800491 (1989-01-01), Hardy
patent: 5187799 (1993-02-01), McAuley et al.
"System Design and Hardware Structure of a forth Machine System", Wada et al., Systems-Computers-Controls, vol. 13, No. 2 Mar. 1982.
"The Design of a Forth Computer", Vaughan et al., Journal of Forth Application and Research, vol. 2, No. 1, 1984, pp. 49-64.
"Single-Chip Micro Speaks Forth", Computer Design, vol. 22, Oct. 1983, pp. 141-142t.
"Complete Control with Forth on a Chip", Robotics Age, vol. 5, Nov./Dec. 1983, pp. 17-23.
"Microprogramming Techniques Using the AM2910 Sequencer", John Mick, IEEE 1978, pp. 81-87.
"Operand Interchange Mechanism", Metz et al., IBTM TDB, vol. 17, No. 1, Jun. 1974, pp. 80-81.
The KOF.9 Computer System by A.C.D. Haley, English Electric Co., Ltd. Kidsgrove, Stoke-on-Trent, England-AFIPS Conference Proceedings, vol. 22, 1962, Fall Joint Computer Conference (Spartan Books).
Moore Charles H.
Murphy Robert W.
Dixon Joseph L.
Harris Corporation
Lane Jack A.
Wands Charles E.
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