Cleaning compositions for solid surfaces – auxiliary compositions – Cleaning compositions or processes of preparing – For cleaning a specific substrate or removing a specific...
Reexamination Certificate
2000-12-08
2002-02-05
Gupta, Yogendra N. (Department: 1751)
Cleaning compositions for solid surfaces, auxiliary compositions
Cleaning compositions or processes of preparing
For cleaning a specific substrate or removing a specific...
C510S177000, C510S178000, C134S001100, C134S001200, C134S001300, C134S002000
Reexamination Certificate
active
06344432
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates generally to chemical formulations that are useful in semiconductor wafer fabrication and particularly to chemical formulations that are utilized to remove residue from wafers following a resist plasma ashing step. More specifically, the present invention relates to cleaning formulations for removal of inorganic residue from semiconductor wafers containing delicate copper interconnecting structures.
2. Description of the Prior Art
Various chemical formulations are conventionally employed to remove residue and clean wafers following a resist ashing step. Some of these chemical formulations include akaline compositions containing amines and/or tetraalkyl ammonium hydroxides, water and/or other solvents, and chelating agents. Such formulations have associated drawbacks which include unwanted removal of metal or insulator layers and the promotion of corrosion of desirable metal layers, particularly copper or copper alloys features.
Some of such formulations employ corrosion-inhibiting additives to prevent undesirable copper metal corrosion during the cleaning process. However, conventional corrosion-inhibiting additives typically have detrimental effects on the cleaning process because such additives interact with the residue and inhibit dissolution of such residue in the cleaning fluid. Further, conventional additives do not easily rinse off copper surfaces after completion of the cleaning process and their presence results in contamination of the integrated circuits. Contamination of the integrated circuit will disadvantageously increase the electrical resistance of the contaminated areas and cause unpredictable conducting failures within the circuitry.
It is therefore an object of the present invention to provide chemical formulations that effectively remove residue following a resist ashing step.
It is another object to provide wafer cleaning formulations that do not attack and potentially degrade delicate metal structures that are meant to remain on the wafer.
It is yet another object of the present invention to provide a wafer cleaning formulation including an improved corrosion inhibitor for protection of copper structures on the semiconductor substrate, in a compositional form that is easily rinsed off by water or other rinse media after the completion of the residue-removal process, thereby reducing contamination of the integrated circuitry on the wafer substrate.
Other objects and advantages of the invention will become fully apparent from the ensuing disclosure and appended claims.
SUMMARY OF THE INVENTION
The present invention relates to semiconductor wafer cleaning formulations having utility for cleaning of semiconductor wafers, e.g., in post plasma ashing semiconductor fabrication.
In one aspect, the invention relates to a method of removing residue from a wafer following a resist plasma ashing step on such wafer, comprising contacting the wafer with a cleaning formulation, including (i) an organic amine, (ii) water, (iii) a nitrogen-containing carboxylic acid or an imine, (iv) a 1,3-dicarbonyl chelating compound, (v) a polar organic solvent, and optionally (vi) at least one other metal chelating agent.
Another aspect of the invention relates to a wafer cleaning formulation, including (i) an organic amine, (ii) water, (iii) a nitrogen-containing carboxylic acid or an imine, (iv) a 1,3-dicarbonyl chelating compound, (v) a polar organic solvent, and optionally (vi) at least one other metal chelating agent.
In a further aspect, the invention relates to a semiconductor wafer cleaning formulation for use in post plasma ashing semiconductor fabrication, comprising the following components in the percentage by weight (based on the total weight of the formulation) ranges shown:
organic amine(s)
2-98%
water
0-50%
1,3-dicarbonyl compound chelating agent
0.1-60%
additional different chelating agent(s)
0-25%
nitrogen-containing carboxylic acid or imine
0.5-40%
polar organic solvent
2-98%
TOTAL
100%
The formulations of the present invention effectively remove inorganic residues, especially metal halide and metal oxide residues, following a plasma ashing step. Such formulations also significantly reduce undesirable corrosion or removal of copper metal structures on the semiconductor wafer during their use.
The formulations of the present invention additionally leave less contamination after the residue-removal process and therefore improve quality of the resulting microelectronic device products.
Other features and advantages of the present invention will be from the ensuing disclosure and appended claims.
REFERENCES:
patent: 5630904 (1997-05-01), Aoyama et al.
patent: 6211126 (2001-04-01), Wojtczak et al.
patent: 6248704 (2001-06-01), Small et al.
Bernhard David
Nguyen Long
Seijo Ma. Fatima
Wojtczak William A.
Advanced Technology & Materials Inc.
Chappuis Margaret
Gupta Yogendra N.
McLauchlan Robert A.
Webb Gregory E.
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