Forming semiconductor structures including activated...

Details Forming semiconductor structures including activated... Forming semiconductor structures including activated...

2001-06-11

2003-03-25

Nelms, David (Department: 2818)

Semiconductor device manufacturing: process

Making device or circuit emissive of nonelectrical signal

C438S046000, C257S096000

Reexamination Certificate

active

06537838

ABSTRACT:

FIELD OF THE INVENTION
The present invention relates to GaN-based III-V semiconductor devices and, in particular, to lowering the resistivity of buried p-type gallium nitride layers in devices such as light-emitting diodes, laser diodes, or heterojunction bipolar transistors.
BACKGROUND
Light-emitting diodes (LEDs) are a highly durable solid-state source of light capable of achieving high luminous efficiency. One important class of III-V light-emitting diodes is based upon compounds of Group III atoms (particularly, In, Ga, and Al) with Group V nitrogen (N), typically abbreviated as “III-nitride.” One family of III-nitride compounds has the general composition In
x
Al
y
Ga
1−x−y
N, where 0≦(x,y) ≦1 and x+y ≦1. This general composition will be simply referred to as GaN. III-nitrides are capable of emitting light that spans a large portion of the ultraviolet and visible electromagnetic spectrum including blue, green, and yellow wavelengths. Improving the brightness and other optical properties of LEDs is an important technical goal.
FIG. 1
is an example of a particular type of LED
10
developed by the present assignee, called an n-p-n tunnel junction LED, having a p-type GaN layer
12
sandwiched between two n-type GaN layers
14
and
15
. Each of these layers
12
,
14
, and
15
may actually consist of many individual epitaxial layers with varying composition or doping level.
The sandwiched p-type layer
12
is referred to as a buried p-type layer. The various layers are epitaxially grown over a sapphire, SiC, or other type of substrate
16
. N-type layer
15
and p-type layer
12
are highly doped. The p-n junction formed by these two layers is reverse-biased by application of a voltage between metal contacts
20
and
21
. Since the doping levels of these two layers is very high (>10
19
cm
−3
), tunneling across the space-charge region can occur at a low reverse bias voltage (<1V), allowing current to flow across the junction. The layers
12
and
14
form a forward-biased p-n junction. When the electrons from n-type layer
14
recombine with the holes from p-type layer
12
, photons of a desired wavelength are emitted from an active region located at the p-n junction between layers
12
and
14
. Since the various layers, including the substrate
16
, are substantially transparent, light is emitted by LED
10
.
Alternatively, the tunnel junction may be formed by layers
12
and
14
, with the active region placed at the junction of layers
12
and
15
. In either case, this structure has the advantage over conventional p-n junction LEDs of using thick n-type layers, with low resistivity, on both sides of the active region. This basic structure can also improve the performance of GaN-based laser diodes.
Heterojunction bipolar transistors (HBTs) also use an n-p-n structure, and the problem discussed below is equally applicable to LED, laser, and bipolar transistor structures.
FIG. 2
illustrates one type of HBT
22
having a substrate
23
, an n-type GaN collector
24
, a p-type GaN base
25
, an n-type GaN emitter
26
, and metal contacts
27
,
28
, and
29
. During the epitaxial growth process, prior to etching the emitter
26
layer to expose the surface of the base
25
layer for the base contact
28
area, the Mg-doped base
25
is “buried” under the n-type emitter
26
.
It is important in the above structures that the conductivity of the n-type and p-type layers be high so that the layers conduct current with a small forward voltage (e.g., <5V for the LED of
FIG. 1
) applied to the contacts.
Although forming low resistivity n-type GaN layers is relatively easy, forming a p-type GaN layer with low resistivity has proven difficult. In a typical process for forming the various GaN epitaxial layers, NH
3
(ammonia) gas is introduced into a chamber during a metal organic chemical vapor deposition (MOCVD) process to contribute the N component, while other gases are introduced to contribute the Group III components and the dopants. To form p-type material, the dopant is typically magnesium (Mg). The Mg atoms are also referred to as acceptors.
During growth of the GaN material incorporating the Mg acceptors, some of the hydrogen atoms from the reaction gases are incorporated in the acceptor-doped epitaxial layers and form a complex with the Mg acceptors, where H is bonded to a nearest-neighbor N atom. This passivates most of the Mg acceptors, effectively neutralizing the effect of these Mg acceptors and leaving a layer which is p-type, but fairly resistive with a hole concentration less than 5×10
15
cm
−3
.
Unintentional H passivation in p-type III-V semiconductors grown by MOCVD is a well-known phenomena. H passivation has been observed in InP, GaAs, InAlGaP, and other materials. See the article “Hydrogen in III-V Device Structures,” by Stephen Stockman and Gregory Stillman, Materials Science Forum, volumes 148-149 (1994), pp. 501-536, and the articles referenced therein.
In a conventional LED structure, the Mg-doped layer is at the surface (i.e., it is not buried beneath an n-type layer). In this case, low-resistivity may be achieved following epitaxial growth by simple annealing in a hydrogen-free ambient to activate acceptors in the acceptor-doped material. This is commonly used as part of the fabrication process in the compound semiconductor industry. See U.S. Pat. No. 5,252,499 to Neumark Rothschild and U.S. Pat. No. 5,306,662 to Nichia Chemical Industries, Ltd. For GaN materials, this thermal annealing process is used to convert highly resistive insulating material to p-type conductivity.
In the prior art, after the anneal, the wafer containing the layers is patterned and etched, followed by a metalization to provide the various contacts. The individual LEDs are then separated out, and the various devices are packaged.
We have found, however, that in devices, such as tunnel-junction LEDs, which incorporate a buried Mg-doped layer, annealing the epitaxial structure, even at temperatures exceeding 800° C., does not result in adequate activation of Mg acceptors. In other words, the annealed p-type buried layer is far from having low resistivity.
Additionally, at such high anneal temperatures, the material quality may be degraded. In one actual device subjected to the high temperature anneal, an initial forward voltage of 15-20 volts (to forward bias the p-n junction) was only reduced by a few volts after the anneal. A high current “soak” for several hours reduced the forward voltage to about 5 volts due to Mg activation via electron-hole recombination in the resistive p-type layer. However, this “soak” is undesirable for a number of reasons: a burn-in is required, complete activation is not achieved, the forward voltage is still too high, the remaining hydrogen may have adverse effects, and there are potential reliability problems.
One reason that a lengthy, high temperature anneal is inadequate to out-diffuse the hydrogen from the p-type layer is that the overlying n-type layer acts as a barrier to hydrogen escape from the surface. One reason for this is that there is a depletion region formed at the p-n interface creating positively charged ions on the n-side of the depletion region and negatively charged ions on the p-side. Since hydrogen diffuses as a proton (H+) in p-type semiconductors, the built-in electric field at this p-n junction repels the positively charged hydrogen ions, preventing the hydrogen from out-diffusing efficiently. In addition, the diffusivity of H in n-type semiconductors is extremely low.
What is needed is an improved technique for increasing the conductivity of a p-type buried layer in tunnel junction LEDs, heterojunction bipolar transistors, and other structures which incorporate a p-type buried layer.
SUMMARY
In one embodiment of the present invention, the wafer incorporating a Group III-V buried p-layer (the acceptor-doped layer) is etched to form trenches in the p-layer to expose sides of the p-layer.
After the etch, the wafer is then annealed at an anneal temperature that may b

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