Fishing – trapping – and vermin destroying
Patent
1987-05-29
1988-08-02
Roy, Upendra
Fishing, trapping, and vermin destroying
357 42, 357 91, 437 31, 437 34, 437 56, 437 97, 437 98, 148DIG82, H01L 21265
Patent
active
047613840
ABSTRACT:
A method for the manufacture of LSI complementary MOS field effect transistor circuits to increase the latch-up hardness of the n-channel and p-channel field effect transistors while retaining good transistor properties by incorporating a further epitaxial layer and highly doped implantation regions into a lower epitaxial layer from which the wells are generated by out-diffusion into the upper epitaxial layer. In addition to achieving optimum transistor properties, the reduced lateral diffusion provided enables a lower n.sup.+ /p.sup.+ spacing, and thus achieves a higher packing density with improved latch-up hardness.
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Rung et al, IEEE Trans. Electron Devices, ED-28 (1981) 1115.
Jacobs Erwin
Mazure-Espejo Carlos-Alberto
Neppl Franz
Winnerl Josef
Roy Upendra
Siemens Aktiengesellschaft
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