Coating processes – Electrical product produced – Condenser or capacitor
Patent
1980-12-19
1982-10-26
Massie, Jerome W.
Coating processes
Electrical product produced
Condenser or capacitor
29576B, 29576W, 29580, 156649, 156653, 156657, 156662, 357 49, 357 50, 427 93, 427 93, 427399, 156643, 427262, H01L 21265, H01L 21308
Patent
active
043562116
ABSTRACT:
Dielectric isolation regions are formed in a monocrystalline silicon substrate through forming trenches in the substrate by reactive ion etching after having etched openings in a layered structure of silicon dioxide and silicon nitride on the surface of the substrate. The walls of the trenches in the substrate are oxidized prior to depositing polycrystalline silicon on the substantially vertical side walls of the trenches in the substrate and on the substantially vertical walls defining the openings in the layered structure. By selectively doping the portion of the polycrystalline silicon on the substantially vertical walls of the openings in the layered structure so that the polycrystalline silicon on the substantially vertical walls of the openings in the layered structure will oxidize at least twice as fast as the polycrystalline silicon on the substantially vertical side walls of the trenches in the substrate, thermal oxidation causes the polycrystalline silicon to close the upper end of each of the trenches while leaving an air space therebeneath to form the dielectric isolation regions.
REFERENCES:
patent: 3874920 (1975-04-01), Chappelow et al.
patent: 4104086 (1978-08-01), Bondur et al.
patent: 4140558 (1979-02-01), Murphy et al.
patent: 4169000 (1979-09-01), Riseman
patent: 4238278 (1980-12-01), Antipou
patent: 4264382 (1981-04-01), Anantha et al.
International Business Machines - Corporation
Leach, Jr. Frank C.
Massie Jerome W.
Saile George O.
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