Forming a type I heterostructure in a group IV semiconductor

Active solid-state devices (e.g. – transistors – solid-state diode – Thin active physical layer which is – Heterojunction

Reexamination Certificate

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

C257S019000, C257S194000, C257SE29069, C257SE29072

Reexamination Certificate

active

07435987

ABSTRACT:
In one embodiment, the present invention includes a method for forming a transistor that includes forming a first buffer layer of silicon germanium tin (SiGe(Sn)) on a silicon (Si) substrate, forming a barrier layer on the first buffer layer, the barrier layer comprising silicon germanium (Si1−xGex), and forming a quantum well (QW) layer on the barrier layer including a lower QW barrier layer formed of silicon germanium carbon (Si1−yGey(C)), a strained QW channel layer formed of germanium on the lower QW layer, and an upper QW barrier layer on the strained QW channel layer formed of Si1−zGez(C). Other embodiments are described and claimed.

REFERENCES:
patent: 6891869 (2005-05-01), Augusto
patent: 2006/0148182 (2006-07-01), Datta et al.
patent: 2006/0237801 (2006-10-01), Kavalieros et al.
U.S. Appl. No. 11/529,963, Filed Sep. 29, 2006, entitled, “Methods For Uniform Doping Of Non-Planar Transistor Structures,” by Brian Doyle, et al.
U.S. Appl. No. 11/450,745, Filed Jun. 9, 2006, entitled, “Strain-Inducing Semiconductor Regions,” by Suman Datta, et al.
Jack Kavalieros, et al., “Tri-Gate Transistor Architecture With High-k Gate Dielectrics, Metal Gates and Strain Engineering,” Jun. 2006, pp. 1-2.
Yu-Hsuan Kuo, et al., “Strong Quantum-Confined Stark Effect In Germanium Quantum-Well Structures On Silicon,” Oct. 2005, pp. 1334-1336.
Minjoo L. Lee, et al., “Strained Si, SiGe, And Ge Channels For High-Mobility Metal-Oxide-Semiconductor Field-Effect Transistors,” Dec. 2004, pp. 1-27.
Minjoo L. Lee, et al., “Strained Si/strained Ge Dual-Channel Heterostructures On Relaxed Si0.5Ge0.5for Symmetric Mobility p-Type and n-Type Metal-Oxide-Semiconductor Field-Effect Transistors,” Sep. 2003, pp. 4202-4204.

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Forming a type I heterostructure in a group IV semiconductor does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Forming a type I heterostructure in a group IV semiconductor, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Forming a type I heterostructure in a group IV semiconductor will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-4011389

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.