Formatter circuit

Details Formatter circuit Formatter circuit

1992-10-22

1994-03-08

Kwon, John T.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

328111, H03K 513

Patent

active

052930793

ABSTRACT:
A formatter circuit for an integrated circuit tester comprises at least one edge-triggered toggle flip-flop, which may be constituted of an EXOR gate and a D flip-flop. This allows to build an event-driven formatter with broad flexibility and "change timing" capability. The basic toggle flip-flops may be cascaded by further EXOR gates, in order to perform more complex functions and to combine several data input signals or clock signals.

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"Applied Ideas" Electronic Engineering, (1989) Jan., No. 745, Woolrich, London, Gr. Britain, pp. 23-24.

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