Semiconductor device manufacturing: process – Formation of electrically isolated lateral semiconductive... – Grooved and refilled with deposited dielectric material
Reexamination Certificate
2001-06-15
2003-08-05
Niebling, John F. (Department: 2812)
Semiconductor device manufacturing: process
Formation of electrically isolated lateral semiconductive...
Grooved and refilled with deposited dielectric material
C438S161000, C438S151000
Reexamination Certificate
active
06602758
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates, most generally, to semiconductor devices and methods for manufacturing the same. More particularly, the present invention relates to a method and structure for forming modular silicon-on-insulator islands on a semiconductor substrate.
BACKGROUND OF THE INVENTION
In today's semiconductor manufacturing industry, silicon-on-insulator (SOI) technology has emerged as a preferred manufacturing method. Devices formed within silicon-on insulator modules are electrically isolated from other devices formed in the substrate and suffer less from noise effects than the conventional technology which includes devices formed directly on a common substrate. Because of the relative noise immunity of the silicon on insulator devices, these devices are high performance devices which can operate at desirably low operating voltages. This low operating voltage advantage is particularly favorable in digital signal processing (DSP) applications. Furthermore, there is little or no cross-talk between a device formed on one isolated SOI island and a device formed on another isolated SOI island or the semiconductor substrate beneath the island. Additionally, SOI devices are essentially immune to radiation effects.
In SOI technology, single-crystal silicon is the preferred silicon material. Single crystal silicon includes a single-crystalline, ordered grain structure which is free of dislocations and therefore can accommodate high surface charges in transistors and other devices. Polycrystalline silicon (polysilicon) is less favored because of random grain boundaries and an inherently disordered grain structure. When thin film transistors (TFT's) are formed in polycrystalline silicon, higher operating voltages are needed. It is well known in the art that lower operating voltages are desirable.
Conventional techniques for forming SOI structures include epitaxial growth of a continuous single crystalline film over a substrate which includes an insulating layer. Another technique is a thermal technique which involves vertical and lateral growth of single crystalline grains as a result of contact to a seed layer of single crystalline silicon such as the substrate over which it is formed. Such techniques include the shortcoming that the entire substrate must be heated to first melt the non-single crystal silicon film so that it may cool and solidify into a single-crystalline film structure. Elevated temperatures are undesirable because they can cause the undesired melting of other structures on the semiconductor substrate and can urge the undesired diffusion of spatially sensitive species from a desired area to an undesired area. Either of these undesired effects can cause device failure. As such, it is desirable to form single crystal silicon structures over a substrate without causing the undesired diffusion and melting of various structures within the substrate due to the entire substrate being subjected to an elevated temperature.
It is also desirable to form modular single crystal SOI islands in selective regions of a semiconductor substrate while also maintaining other regions of the semiconductor substrate on which to directly form conventional semiconductor devices such as CMOS devices, for example. The simultaneous formation of both conventional and SOI devices on the same semiconductor substrate provides new avenues of opportunities for forming a multiplicity of various circuits and devices on a single semiconductor substrate. Furthermore, it would be desirable to employ both CMOS processing technology to form CMOS structures and circuits on a chip while also employing SOI processing technology to form SOI structures on the same chip.
In view of the above shortcomings and responsive to present needs of semiconductor processing technology, it would therefore be desirable to provide a method and structure for providing modular SOI islands on a chip which are large enough to accommodate semiconductor devices formed thereon while also maintaining portions of the same chip for conventional CMOS processing and device formation. It would further be desired to form such a structure using a process which does not require elevated temperatures throughout the substrate such as may adversely affect or destroy other device features. The present invention addresses these needs.
SUMMARY OF THE INVENTION
To achieve these and other objects, and in view of its purposes, the present invention provides a method for forming modular SOI islands over a semiconductor substrate. The use of isolated SOI islands suppresses noise and minimizes cross-talk between devices. The present invention also provides utilizing other sections of the semiconductor substrate for the formation of conventional semiconductor devices such as CMOS devices, formed directly on the substrate. The method induces providing a silicon substrate with a trench therein, then forming an insulating layer over the substrate and within the trench, but not extending to the top of the trench, the insulating layer therefore including at least one opening exposing a sidewall of the trench, each sidewall corresponding to a substrate contact area. An amorphous silicon layer is formed over the insulating layer and within the trench, and contacting the contact area of the substrate. The amorphous silicon layer is converted to substantially single crystal silicon as the substrate is subjected to laser irradiation which includes operating conditions chosen to selectively melt only the exposed amorphous silicon. Advantageously, an excimer laser is used. Other structures and regions of the substrate exposed to the laser radiation either are non-absorptive to the radiation or are not heated to a point at which defects occur. After the blanket exposure of the substrate to laser irradiation has been used to selectively melt only the amorphous silicon, the laser annealing process continues as established solidification principles are used and cooling conditions chosen to utilize the portion of the semiconductor substrate contacted by the amorphous silicon film as a seed layer to produce the ordered, substantially single-crystalline silicon film. The single-crystalline silicon film thereby formed over the insulating layer, may be patterned to form electrically isolated SOI islands upon which devices can be formed.
REFERENCES:
patent: 4559102 (1985-12-01), Hayafuji
patent: 5528054 (1996-06-01), Ipposhi, et al.
patent: 6214653 (2001-04-01), Chen
patent: 6218678 (2001-04-01), Zhang et al.
patent: 6235614 (2001-05-01), Yang
patent: 2001/0003364 (2001-06-01), Sugawara et al.
patent: 0 179 719 (1986-04-01), None
patent: 0 331 811 (1989-09-01), None
patent: 2 266 993 (1993-11-01), None
patent: 57023218 (1982-02-01), None
Giust, et al., “Comparison of excimer laser recrystallized prepatterned and unpatterned silicon films on SiO2,” J. Appl. Phys., Feb. 1997, pp. 1204-1211, vol. 81, No. 3, American Institute of Physics.
Song, et al., “Single-crystal Si islands on SiO2obtained via excimer-laser irradiation of a patterned Si film,” Appl. Phys. Lett., May 1996, pp. 3165-3167, vol. 68, No. 22, American Institute of Physics.
Sposili, et al., “Sequential lateral solidification of thin silicon films on SiO2,” Appl. Phys. Lett., Nov. 1996, pp. 2864-2866, vol. 69, No. 19, American Institute of Physics.
GB Search Report for related GB Application No. 0213863.4, dated Feb. 19, 2003, 1 page.
Kizilyalli Isik C.
Radosevich Joseph R.
Agere Systems Inc.
Christie Parker & Hale LLP
Isaac Stanetta
Niebling John F.
LandOfFree
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