Fishing – trapping – and vermin destroying
Patent
1989-10-20
1990-09-18
Hearn, Brian E.
Fishing, trapping, and vermin destroying
437 40, 437 41, 437 51, 437228, 437235, 437245, H01L 23522
Patent
active
049578812
ABSTRACT:
A process for forming self-aligned metal-semiconductor contacts in a device comprising MISFET type structures essentially comprises conformably depositing a matrix metallic layer on the front of the wafer and the subsequent deposition of a planarization SOG layer. After having used a noncritical mask for defining the "length" of the selfaligned contacts to be formed, the SOG layer is etched until leaving a residue layer on the bottom of the valleys of the conformably deposited matrix metallic layer in areas between two adjacent gate lines of polysilicon. A selective etching of the matrix layer using said SOG residues as a mask, defines the contacts, self-aligned in respect to the opposite spacers of two adjacent polysilicon gate lines. An insulating dielectric layer is deposited and etched until exposing the peaks of the preformed contacts. Over such an advantageously planarized surface contacts on the polysilicon gate lines may be defined by a customary masking process and finally the second level metal is deposited.
REFERENCES:
patent: 4398335 (1983-08-01), Lehrer
patent: 4502210 (1985-03-01), Okuyama et al.
patent: 4505030 (1985-03-01), Jeuch
patent: 4545852 (1985-10-01), Barton
patent: 4662064 (1987-05-01), Hsu et al.
patent: 4894351 (1990-01-01), Balty
Hearn Brian E.
SGS--Thomson Microelectronics S.r.l.
Thomas T.
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