Electricity: conductors and insulators – Conduits – cables or conductors – Preformed panel circuit arrangement
Reexamination Certificate
2001-01-17
2002-07-30
Cuneo, Kamand (Department: 2827)
Electricity: conductors and insulators
Conduits, cables or conductors
Preformed panel circuit arrangement
C174S262000, C174S265000, C361S792000, C361S795000, C029S852000, C439S065000
Reexamination Certificate
active
06426470
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Technical Field
The present invention relates to plated through holes and more particularly to a method and structure for forming multisegmented plated through holes.
2. Related Art
A plated through hole (PTH) in a printed circuit board (PCB) provides electrical communication between a first electrically conductive structure electrically coupled to a first portion of the PTH and a second electrically conductive structure electrically coupled to a second portion of the PTH. Unfortunately, constraining the electrical coupling of such conductive structure to the first and second portions of the PTH limits the wiring density that can be achieved in the PCB.
There is a need to utilize a PTH in a substrate in a manner that facilitates increased wiring density in the PCB.
SUMMARY OF THE INVENTION
The present invention provides a method for forming at least one multisegmented plated through hole (PTH) in a substrate, comprising the steps of:
providing a first laminate having a dielectric layer and a second laminate having a dielectric layer;
forming a first selective plate core (SPC) by sandwiching a dielectric layer between a first metal layer and a second metal layer, wherein the dielectric layer of the first SPC includes a nonplatable dielectric material;
forming the substrate by sandwiching the first SPC between the first laminate and the second laminate;
forming a first through hole through the substrate; and
metalizing a wall of the first through hole to form a first PTH of the at least one PTH, resulting in a metal plating on the first PTH that: plates to the first laminate, plates to the second laminate, does not plate to the first SPC, and is not continuous from the first laminate to the second laminate.
The present invention provides a method for forming at least one multisegmented plated through hole (PTH) in a substrate, comprising the steps of:
providing a first laminate having a dielectric layer and a second laminate having a dielectric layer;
forming a first selective plate core (SPC) by sandwiching a dielectric layer between a first metal layer and a second metal layer such that the dielectric layer of the first SPC includes a platable dielectric material, forming a hole through the first SPC, and filling the hole with a nonplatable dielectric material to form a plug within the hole;
forming the substrate by sandwiching the first SPC between the first laminate and the second laminate;
forming a first through hole through the substrate such that the first through hole passes through the plug resulting in a cylindrical segment of the nonplatable dielectric material circumscribing a portion of the first through hole; and
metalizing a wall of the first through hole to form a first PTH of the at least one PTH, resulting in a metal plating on the first PTH that: plates to the first laminate, plates to the second laminate, does not plate to the first SPC, and is not continuous from the first laminate to the second laminate.
The present invention provides an electrical structure, comprising:
a substrate including a first selective plate core (SPC) sandwiched between a first laminate and a second laminate, wherein the first laminate includes a dielectric layer, wherein the second laminate includes a dielectric layer, and wherein the first SPC comprises a dielectric layer having a nonplatable dielectric material;
a first through hole through the substrate, wherein a metal plating on a wall of the first through hole: is plated to the first laminate, is plated to the second laminate, is not plated to the first SPC, and is not continuous from the first laminate to the second laminate.
The present invention provides an electrical structure, comprising:
a substrate including a first selective plate core (SPC) sandwiched between a first laminate and a second laminate, wherein the first laminate includes a dielectric layer, wherein the second laminate includes a dielectric layer, wherein the first SPC includes a dielectric layer having a dielectric material that is platable, wherein the first SPC further includes a cylindrical segment of a dielectric material that is nonplatable, and wherein the cylindrical segment extends through a total thickness of the first SPC; and
a first through hole through the substrate, wherein the cylindrical segment circumscribes a portion of the first through hole, and wherein a metal plating on a wall of the first through hole: is plated to the first laminate, is plated to the second laminate, is not plated to the first SPC, and is not continuous from the first laminate to the second laminate.
The present invention provides a method and structure for utilizing a PTH in a substrate in a manner that facilitates an increased wiring density in the substrate.
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Multi Layer Substrate with Low Coefficent of Thermal Expansion, Nakamura et al., 2000 International Symposium on Microelect, pp. 235-240.
Farquhar Donald S.
Japp Robert M.
Lauffer John M.
Papathomas Konstantinos I.
Cuneo Kamand
Fraley Lawrence R.
International Business Machines - Corporation
Patel I B
Schmeiser Olsen & Watts
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