Formation of micro rough polysurface for low sheet resistant...

Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – With textured surface

Reexamination Certificate

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C257S347000, C257S619000, C257S754000, C257S750000

Reexamination Certificate

active

06992388

ABSTRACT:
This invention relates to a method for manufacturing a semiconductor device having polysilicon lines with micro-roughness on the surface. The micro-rough surface of the polysilicon lines help produce smaller grain size silicide film during the formation phase to reduce the sheet resistance. The micro-rough surface of the polysilicon lines also increases the effective surface area of the silicide contacting polysilicon lines thereby reduces the overall resistance of the final gate structure after metallization.

REFERENCES:
patent: 5182232 (1993-01-01), Chhabra et al.
patent: 5394012 (1995-02-01), Kimura
patent: 5418188 (1995-05-01), Harper et al.
patent: 5422289 (1995-06-01), Pierce
patent: 5554566 (1996-09-01), Lur et al.
patent: 5563096 (1996-10-01), Nasr
patent: 5585295 (1996-12-01), Wu
patent: 5599746 (1997-02-01), Lur et al.
patent: 5648673 (1997-07-01), Yasuda
patent: 5654589 (1997-08-01), Huang et al.
patent: 5767013 (1998-06-01), Park et al.
patent: 5780929 (1998-07-01), Zeininger et al.
patent: 5877063 (1999-03-01), Gilchrist
patent: 5893751 (1999-04-01), Jenq et al.
patent: 5904529 (1999-05-01), Gardner et al.
patent: 5937325 (1999-08-01), Ishida
patent: 5993685 (1999-11-01), Currie et al.
patent: 6074926 (2000-06-01), Cathey et al.
patent: 6232173 (2001-05-01), Hsu et al.
patent: 6242333 (2001-06-01), McNeil et al.
patent: 6297525 (2001-10-01), Parekh et al.
patent: 6359321 (2002-03-01), Shimizu et al.
patent: 6424011 (2002-07-01), Assaderaghi et al.
patent: 6555432 (2003-04-01), Sandhu et al.
patent: 2001/0021552 (2001-09-01), Parekh et al.
patent: 2002/0008291 (2002-01-01), Shimizu et al.
patent: 06151353 (1994-05-01), None
Chang, C. Y. and Sze, S.M., “ULSi Technology,” 1996, The McGraw-Hill Companies, Inc., pp. 229, 395-397.
Wolf, S., “Silicon Processing for the VLSI Era,” vol. 2—Process Integration , 1990, Lattice Press, pp. 45, 354-357.

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