Formation of a silicon germanium-on-insulator structure by...

Metal treatment – Process of modifying or maintaining internal physical... – With ion implantation

Reexamination Certificate

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C148S277000, C148S279000, C148S518000, C205S123000, C205S157000, C438S479000, C438S480000

Reexamination Certificate

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07125458

ABSTRACT:
A simple and direct method of forming a SiGe-on-insulator that relies on the oxidation of a porous silicon layer (or region) that is created beneath a Ge-containing layer is provided. The method includes the steps of providing a structure comprising a Si-containing substrate having a hole-rich region formed therein and a Ge-containing layer atop the Si-containing substrate; converting the hole-rich region into a porous region; and annealing the structure including the porous region to provide a substantially relaxed SiGe-on-insulator material.

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patent: 6828214 (2004-12-01), Notsu et al.
Mizuno, et al., “High Performance CMOS Operation of Strained-SOI MOSFETs Using Thin Film SiGe-On-Insulator Substrate”, 2002 Symposium on VLSI Technology, Digest of Technical Papers, Honolulu, Jun. 11-13, 2002, Symposium on VLSI Technology, New York, NY: IEEE, US, Jun. 11, 2002, pp. 106-107, XP001109839.
Patent Abstracts of Japan, vol. 005, No. 181 (E-083), Nov. 20, 1981, 56-110247.
Patent Abstracts of Japan, vol. 005, No. 117 (E-067), May 18, 1981, 56-056648.

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